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jobmmugpu2(77777 core0core1core2core3core4 \uokay clock-controller@13fbf000mediatek,mt8192-mfgcfgsyscon@14000000mediatek,mt8192-mmsyssyscon ]] ]mutex@14001000mediatek,mt8192-disp-mutex< ] 7 smi@14002000mediatek,mt8192-smi-common   apbsmigals0gals17 ^larb@14003000mediatek,mt8192-smi-larb0 # 4^apbsmi7 blarb@14004000mediatek,mt8192-smi-larb@ # 4^apbsmi7 covl@14005000mediatek,mt8192-disp-ovlP< A__7  ]Povl@14006000mediatek,mt8192-disp-ovl-2l`<7  A_"_  ]`rdma@140070004mediatek,mt8192-disp-rdmamediatek,mt8183-disp-rdmap< A_ H7  ]pcolor@140090006mediatek,mt8192-disp-colormediatek,mt8173-disp-color<7  ]ccorr@1400a000mediatek,mt8192-disp-ccorr<7   ]aal@1400b0002mediatek,mt8192-disp-aalmediatek,mt8183-disp-aal<7  ]gamma@1400c0006mediatek,mt8192-disp-gammamediatek,mt8183-disp-gamma<7   ]postmask@1400d000mediatek,mt8192-disp-postmask<7   ]dither@1400e0008mediatek,mt8192-disp-dithermediatek,mt8183-disp-dither<7   ]dsi@14010000mediatek,mt8183-dsi<  `enginedigitalhs&` `dphy7 |uokayportendpoint'aCovl@14014000mediatek,mt8192-disp-ovl-2l@< 7  A_#_! ]@rdma@140150004mediatek,mt8192-disp-rdmamediatek,mt8183-disp-rdmaP< 7  A_% H ]Pdpi@14016000mediatek,mt8192-dpi`<!2pixelenginepll udisabledm4u@1401d000mediatek,mt8192-m4u< jbcdefghijklmnop<bclk7  y_clock-controller@15020000mediatek,mt8192-imgsyslarb@1502e000mediatek,mt8192-smi-larb #  4^apbsmi7 hclock-controller@15820000mediatek,mt8192-imgsys2larb@1582e000mediatek,mt8192-smi-larb #  4^apbsmi7 ivideo-codec@16000000mediatek,mt8192-vcodec-dec q A_+k`video-codec@10000mediatek,mtk-vcodec-lat<@ A________(4   Fselsoc-vdecsoc-latvdectop4 F7video-codec@25000mediatek,mtk-vcodec-coreP<X A___________(4!!!Fselsoc-vdecsoc-latvdectop4 F7larb@1600d000mediatek,mt8192-smi-larb # 4^ apbsmi7fclock-controller@1600f000mediatek,mt8192-vdecsys_soc larb@1602e000mediatek,mt8192-smi-larb # 4^!!apbsmi7eclock-controller@1602f000mediatek,mt8192-vdecsys!clock-controller@17000000mediatek,mt8192-vencsyslarb@17010000mediatek,mt8192-smi-larb # 4^apbsmi7gvcodec@17020000mediatek,mt8192-vcodec-enc X A___________<5 q7 venc_sel3 Wclock-controller@1a000000mediatek,mt8192-camsys"larb@1a001000mediatek,mt8192-smi-larb #  4^""apbsmi7jlarb@1a002000mediatek,mt8192-smi-larb  # 4^""apbsmi7klarb@1a00f000mediatek,mt8192-smi-larb # 4^##apbsmi7llarb@1a010000mediatek,mt8192-smi-larb # 4^$$apbsmi7mlarb@1a011000mediatek,mt8192-smi-larb # 4^%%apbsmi7nclock-controller@1a04f000mediatek,mt8192-camsys_rawa#clock-controller@1a06f000mediatek,mt8192-camsys_rawb$clock-controller@1a08f000mediatek,mt8192-camsys_rawc%clock-controller@1b000000mediatek,mt8192-ipesyslarb@1b00f000mediatek,mt8192-smi-larb # 4^apbsmi7 plarb@1b10f000mediatek,mt8192-smi-larb # 4^apbsmi7 oclock-controller@1f000000mediatek,mt8192-mdpsyslarb@1f002000mediatek,mt8192-smi-larb  # 4^apbsmi7 dthermal-zonescpu0-thermal   rtripstrip-alert L Epassivestrip-crit   Ecriticalcooling-mapsmap0 s0 cpu1-thermal   rtripstrip-alert L Epassivettrip-crit   Ecriticalcooling-mapsmap0 t0 cpu2-thermal   rtripstrip-alert L Epassiveutrip-crit   Ecriticalcooling-mapsmap0 u0 cpu3-thermal   rtripstrip-alert L Epassivevtrip-crit   Ecriticalcooling-mapsmap0 v0 cpu4-thermal   rtripstrip-alert L Epassivewtrip-crit   Ecriticalcooling-mapsmap0 w0 cpu5-thermal   rtripstrip-alert L Epassivextrip-crit   Ecriticalcooling-mapsmap0 x0 cpu6-thermal   rtripstrip-alert L Epassiveytrip-crit   Ecriticalcooling-mapsmap0 y0 cpu7-thermal   rtripstrip-alert L Epassiveztrip-crit   Ecriticalcooling-mapsmap0 z0 vpu0-thermal   {tripstrip-alert L Epassivetrip-crit   Ecriticalvpu1-thermal   { tripstrip-alert L Epassivetrip-crit   Ecriticalgpu-thermal   { tripstrip-alert L Epassivetrip-crit   Ecriticalgpu1-thermal   { tripstrip-alert L Epassivetrip-crit   Ecriticalinfra-thermal   { tripstrip-alert L Epassivetrip-crit   Ecriticalcam-thermal   { tripstrip-alert L Epassivetrip-crit   Ecriticalmd0-thermal   {tripstrip-alert L Epassivetrip-crit   Ecriticalmd1-thermal   {tripstrip-alert L Epassivetrip-crit   Ecriticalmd2-thermal   {tripstrip-alert L Epassivetrip-crit   Ecriticalchosen serial0:115200n8memory@40000000memory@backlight-lcd0pwm-backlight | 7}    ,@Edmic-codec dmic-codec E R2regulator-1v0-dpbrdgregulator-fixedpp1000_dpbrdgdefault~B@B@ b u  regulator-1v0-mipibrdgregulator-fixedpp1000_mipibrdgdefaultB@B@ b u  @regulator-1v8-dpbrdgregulator-fixedpp1800_dpbrdgdefault b u ~ Kregulator-1v8-gregulator-fixed pp1800_ldo_g uw@w@ 4regulator-1v8-mipibrdgregulator-fixedpp1800_mipibrdgdefault b u  KAregulator-3v3-dpbrdgregulator-fixedpp3300_dpbrdgdefault b u  4regulator-3v3-gregulator-fixed pp3300_g u2Z2Z }4regulator-3v3-zregulator-fixed pp3300_ldo_z u2Z2Z }regulator-3v3-mipibrdgregulator-fixedpp3300_mipibrdgdefault b u  4  Bregulator-3v3-uregulator-fixed pp3300_u u2Z2Z 4Nregulator-3v3-wlanregulator-fixed pp3300_wlan u2Z2Zdefault b regulator-5v0-aregulator-fixed pp5000_a uLK@LK@ }5regulator-var-sysregulator-fixed ppvar_sys u}reserved-memory+kscp@50000000shared-dma-poolP .wifi@c0000000restricted-dma-pool;audio-codecrealtek,rt1015pdefault ]sound aud_clk_mosi_offaud_clk_mosi_onaud_dat_mosi_offaud_dat_mosi_onaud_dat_miso_offaud_dat_miso_onvow_dat_miso_offvow_dat_miso_onvow_clk_miso_offvow_clk_miso_onaud_nle_mosi_offaud_nle_mosi_onaud_dat_miso2_offaud_dat_miso2_onaud_gpio_i2s3_offaud_gpio_i2s3_onaud_gpio_i2s8_offaud_gpio_i2s8_onaud_gpio_i2s9_offaud_gpio_i2s9_onaud_dat_mosi_ch34_offaud_dat_mosi_ch34_onaud_dat_miso_ch34_offaud_dat_miso_ch34_onaud_gpio_tdm_offaud_gpio_tdm_on          % 0 ; F Q \ g r }      'mediatek,mt8192_mt6359_rt1015p_rt5682sspeaker-codecs headset-codec pwmleds pwm-ledsled kbd_backlight    compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeovl0ovl-2l0ovl-2l2rdma0rdma4i2c0i2c1i2c2i2c3i2c7mmc0mmc1serial0#clock-cellsclocksclock-divclock-multclock-output-namesphandleclock-frequencydevice_typeregenable-methodcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheperformance-domainscapacity-dmips-mhz#cooling-cellscpucache-levelcache-unifiedentry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-usinterruptsopp-sharedopp-hzopp-microvoltdma-ranges#performance-domain-cells#interrupt-cells#redistributor-regionsinterrupt-controllermediatek,broken-save-restore-fwaffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangesgpio-line-namespinmuxoutput-lowinput-enablebias-pull-updrive-strengthdrive-strength-microampbias-disablebias-pull-downoutput-high#power-domain-cellsclock-namesmediatek,infracfgdomain-supplyassigned-clocksassigned-clock-parentsinterrupts-extended#io-channel-cellsmediatek,dmic-modemediatek,mic-type-0mediatek,mic-type-2regulator-nameregulator-min-microvoltregulator-max-microvoltregulator-enable-ramp-delayregulator-always-onregulator-ramp-delayregulator-allowed-modesregulator-coupled-withregulator-coupled-max-spreadregulator-compatible#mbox-cellsstatusresetsnvmem-cellsnvmem-cell-names#thermal-sensor-cellsreset-names#pwm-cellspinctrl-namespinctrl-0mediatek,pad-selectspi-max-frequencywakeup-sourcegoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countlabelpower-roledata-roletry-power-rolekeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymapfunction-row-physmapcs-gpiosfirmware-namememory-regionmediatek,rpmsg-nameinterrupt-namesphysmediatek,syscon-wakeupvusb33-supplyvbus-supplymediatek,apmixedsysmediatek,topckgenpower-domainsbus-rangeinterrupt-map-maskinterrupt-mapnum-lanesspi-rx-bus-widthspi-tx-bus-widthenable-gpiosreset-gpiosvdd10-supplyvdd18-supplyvdd33-supplyremote-endpointpower-supplybacklightrealtek,jd-src#sound-dai-cellsAVDD-supplyDBVDD-supplyLDO1-IN-supplyMICVDD-supplyclock-stretch-nsvcc-supply#phy-cellspinctrl-1vmmc-supplyvqmmc-supplycap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vsupports-cqecap-mmc-hw-resetmmc-hs400-enhanced-strobehs400-ds-delayno-sdiono-sdnon-removablecd-gpioscap-sd-highspeedsd-uhs-sdr50sd-uhs-sdr104no-mmcpower-domain-namesoperating-points-v2mali-supplymboxesmediatek,gce-client-regmediatek,gce-eventsmediatek,larb-idmediatek,smiiommusmediatek,rdma-fifo-sizephy-namesmediatek,larbs#iommu-cellsmediatek,scppolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-pathpwmsbrightness-levelsnum-interpolated-stepsdefault-brightness-levelnum-channelswakeup-delay-msenable-active-highregulator-boot-ongpiovin-supplyoff-on-delay-usno-mapsdb-gpiosmediatek,platformpinctrl-2pinctrl-3pinctrl-4pinctrl-5pinctrl-6pinctrl-7pinctrl-8pinctrl-9pinctrl-10pinctrl-11pinctrl-12pinctrl-13pinctrl-14pinctrl-15pinctrl-16pinctrl-17pinctrl-18pinctrl-19pinctrl-20pinctrl-21pinctrl-22pinctrl-23pinctrl-24pinctrl-25sound-daifunctioncolormax-brightness