b18[T([$mediatek,mt8365-evkmediatek,mt8365 +"7MediaTek MT8365 Open Platform EVKcpus+opp-table-0operating-points-v2=H opp-850000000P2W opp-918000000P6W 4Nopp-987000000P:lW }opp-1056000000P>HW opp-1125000000PC#@W opp-1216000000PHzW qopp-1308000000PMW Xopp-1400000000PSrNW 5opp-1466000000PWabW opp-1533000000P[_@W Popp-1633000000PaU@W opp-1700000000PeSW topp-1767000000PiRGWNopp-1834000000PmPWopp-1917000000PrC@W)opp-2001000000PwD@Wcpu-mapcluster0core0ecore1ecore2ecore3ecpu@0icpuarm,cortex-a53uypsci @@  cpuintermediate" 6 BHcpu@1icpuarm,cortex-a53uypsci @@  cpuintermediatearmpll" 6 BHcpu@2icpuarm,cortex-a53uypsci @@  cpuintermediatearmpll" 6 BHcpu@3icpuarm,cortex-a53uypsci @@  cpuintermediatearmpll" 6 BHidle-statesNpscicpu-mcdiarm,idle-state[l,Hcluster-mcdiarm,idle-state[l^Hcluster-dpidlearm,idle-state[l,  Hl2-cachecache@H oscillator fixed-clockclk26mHpsci arm,psci-1.0smcsoc+ simple-businterrupt-controller@c000000 arm,gic-v3 Pu   @ A B  , Hsyscon@10000000 mediatek,mt8365-topckgensysconuHsyscon@10001000 mediatek,mt8365-infracfgsysconuHsyscon@10003000mediatek,mt8365-pericfgsysconu0syscfg-pctl@10005000mediatek,mt8365-syscfgsysconuPHsyscon@10006000)mediatek,mt8365-scpsyssysconsimple-mfdu`power-controller!mediatek,mt8365-power-controller+7H3power-domain@0u(?mmmm-0mm-1mm-2mm-37K]+power-domain@4u0$cam-0cam-1cam-2cam-3cam-4cam-57Kspower-domain@6u7spower-domain@7u7spower-domain@8u8:(apuapu-0apu-1apu-2apu-3apu-4apu-57Kspower-domain@1u connconn17Kpower-domain@2uAmfg7Kpower-domain@3uM!$audioaudio1audio27Kpower-domain@5u_ dspdsp17Kwatchdog@10007000(mediatek,mt8365-wdtmediatek,mt6589-wdtuppinctrl@1000b000mediatek,mt8365-pinctrlu ,sHaudiodefault-pinsH8clk-dat-pinsHIJKaudiodmic-pinsH9clk-dat-pins uvwmisooff-pinsH:clk-dat-pins5678misoon-pinsH;clk-dat-pins5678mosioff-pinsH<clk-dat-pins1234mosion-pinsH=clk-dat-pins1234ethernet-pinsH1phy_reset_pinsrmii_pins@     gpio-keys-pinsH7pinsi2c0-pinsH#pins9:mmc0-default-pinsH)clk-pinsccmd-dat-pins$gfed`_^]brst-pinsammc0-uhs-pinsH*clk-pinsc fcmd-dat-pins$gfed`_^]b eds-pinsh frst-pinsa mmc1-default-pinsH-cd-pinsLclk-pinsXfcmd-dat-pinsYZ[\Wemmc1-uhs-pinsH.clk-pinsXfcmd-dat-pinsYZ[\Weuart0-pinsHpins#$uart1-pinsH pins%&uart2-pinsH!pins'(usb-pinsH&id-pinsusb0-vbus-pinsusb1-vbus-pinspwm-pinsH"pinstsyscon@1000c000"mediatek,mt8365-apmixedsyssysconuH pwrap@1000d000mediatek,mt8365-pwrapu pwrap ,{ /0.spiwrapsystmrpmicmediatek,mt6357 'Cadcmediatek,mt6357-auxadc_regulatorsbuck-vprocqvproc^jH buck-vcoreqvcore^jbuck-vmodemqvmodem 7jbuck-vs1qvs1O!0buck-vpaqvpa 7Pldo-vfe28regulator-fixedqvfe28**ldo-vxo22qvxo22!$nldo-vrf18regulator-fixedqvrf18w@w@nldo-vrf12regulator-fixedqvrf12OOnldo-vefuseqvefuseO2Zldo-vcn33-bt qvcn33-bt2Z5gldo-vcn33-wifi qvcn33-wifi2Z5gldo-vcn28regulator-fixedqvcn28**ldo-vcn18regulator-fixedqvcn18w@w@ldo-vcamaqvcama&%*ldo-vcamdqvcamdB@w@ldo-vcamio18regulator-fixedqvcamiow@w@ldo-vldo28qvldo28*-ldo-vsram-others qvsram-others^jnldo-vsram-proc qvsram-proc^jnHldo-vaux18regulator-fixedqvaux18w@w@ldo-vaud28regulator-fixedqvaud28**ldo-vio28regulator-fixedqvio28**ldo-vio18regulator-fixedqvio18w@w@H,ldo-vdramqvdramO ldo-vmcqvmcw@2Z,H0ldo-vmchqvmch,@ 2Z,H/ldo-vemcqvemc,@ 2Z,H+ldo-vsim1qvsim1/M`ldo-vsim2qvsim2/M`ldo-vibrqvibrO2Z,ldo-vusb33qvusb33-/M`H'rtcmediatek,mt6357-rtckeysmediatek,mt6357-keyskey-powertkey-homefkeypad@10010000mediatek,mt6779-keypadu ,|kpd disabledsyscon@10200000mediatek,mt8365-mcucfgsysconu H interrupt-controller@10200a80.mediatek,mt8365-sysirqmediatek,mt6577-sysirq u Hiommu@10205000mediatek,mt8365-m4uu P ,f(infracfg@1020e000 mediatek,mt8365-infracfgsysconu Hrng@1020f000(mediatek,mt8365-rngmediatek,mt7623-rngu rngdma-controller@110002802mediatek,mt8365-uart-dmamediatek,mt6577-uart-dma`uH,-./0345apdmaBHserial@11002000*mediatek,mt8365-uartmediatek,mt6577-uartu  ,#  baudbusMRtxrxokay\fdefaultserial@11003000*mediatek,mt8365-uartmediatek,mt6577-uartu0 ,$  baudbusMRtxrxokay\ fdefaultserial@11004000*mediatek,mt8365-uartmediatek,mt6577-uartu@ ,%  baudbusMRtxrxokay\!fdefaultpwm@11006000mediatek,mt8365-pwmu`t ,L(   topmainpwm1pwm2pwm3\"fdefaultokayi2c@11007000(mediatek,mt8365-i2cmediatek,mt8168-i2c up ,4 maindma+okay\#fdefaulti2c@11008000(mediatek,mt8365-i2cmediatek,mt8168-i2c u ,5 maindma+ disabledi2c@11009000(mediatek,mt8365-i2cmediatek,mt8168-i2c u ,6 maindma+ disabledspi@1100a000(mediatek,mt8365-spimediatek,mt7622-spiu+ ,>Fparent-clksel-clkspi-clk disabledi2c@1100f000(mediatek,mt8365-i2cmediatek,mt8168-i2c u ,7 maindma+ disabledusb@11201000#mediatek,mt8365-mtu3mediatek,mtu3 u . >  macippc ,$% EDsys_ckref_ckmcu_ckdma_ck+okayotg high-speed\&fdefault'usb@11200000'mediatek,mt8365-xhcimediatek,mtk-xhciu  mac ,C(EDF$sys_ckref_ckmcu_ckdma_ckxhci_ckokay'connector%gpio-usb-b-connectorusb-b-connector pmicro(mmc@11230000(mediatek,mt8365-mmcmediatek,mt8183-mmc u# ,I+sourcehclksource_cgokay5I+ : HWflt\)*fdefaultstate_uhs+,mmc@11240000(mediatek,mt8365-mmcmediatek,mt8183-mmc u$ ,K,sourcehclksource_cgokay L: \-.fdefaultstate_uhs/0mmc@11250000(mediatek,mt8365-mmcmediatek,mt8183-mmc u% ,D(J-A)%sourcehclksource_cgbus_clksys_cg disabledethernet@112a0000mediatek,mt8365-ethu* ,c89coreregtrans disabled\1fdefault2rmiimdio+ethernet-phy@0uH2t-phy@11cc0000.mediatek,mt8365-tphymediatek,generic-tphy-v2+usb-phy@0u refda_refH$usb-phy@1000u refda_refH%syscon@14000000mediatek,mt8365-mmsyssysconuHsmi@14002000mediatek,mt8365-smi-commonu  apbsmigals0gals1 3Hlarb@140030002mediatek,mt8365-smi-larbmediatek,mt8186-smi-larbu0sapbsmi 3Hsyscon@15000000mediatek,mt8365-imgsyssysconuHlarb@150010002mediatek,mt8365-smi-larbmediatek,mt8186-smi-larbusapbsmi 3Hsyscon@16000000mediatek,mt8365-vdecsyssysconuH4larb@160100002mediatek,mt8365-smi-larbmediatek,mt8186-smi-larbus44apbsmi 3Hsyscon@17000000mediatek,mt8365-vencsyssysconuH5larb@170100002mediatek,mt8365-smi-larbmediatek,mt8186-smi-larbus55apbsmi 3Hsyscon@19020000mediatek,mt8365-apusysconuHaudio-controller@11220000mediatek,mt8365-afe-pcmu")lLyz{|PQNOijkltop_clk26m_clktop_audio_selaudio_i2s0_maudio_i2s1_maudio_i2s2_maudio_i2s3_mengen1engen2aud1aud2i2s0_m_seli2s1_m_seli2s2_m_seli2s3_m_sel ,a 3okay:H>timerarm,armv8-timer 0,   dummy13m fixed-clock]@H6timer@10017000/mediatek,mt8365-systimermediatek,mt6765-timerup ,6clk13maliasesM/soc/serial@11002000chosenUserial0:921600n8firmwareopteelinaro,optee-tzsmcgpio-keys gpio-keysfdefault\7key-volume-up  avolume_upgsrmemory@40000000imemoryu@regulator-0regulator-fixed qotg_vbusLK@LK@ H(reserved-memory+secmon@43000000uCoptee@43200000uC soundmediatek,mt8365-mt6357/fdefaultdmicmiso_offmiso_onmosi_offmosi_on\89:;<=> compatibleinterrupt-parent#address-cells#size-cellsmodelopp-sharedphandleopp-hzopp-microvoltcpudevice_typereg#cooling-cellsenable-methodcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheclocksclock-namesoperating-points-v2proc-supplysram-supplyentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unified#clock-cellsclock-frequencyclock-output-namesranges#interrupt-cellsinterrupt-controllerinterrupts#power-domain-cellsmediatek,infracfgmediatek,infracfg-naomediatek,smi#reset-cellsmediatek,pctl-regmapgpio-controller#gpio-cellspinmuxinput-enablebias-pull-downdrive-strengthbias-pull-upoutput-highreg-namesinterrupts-extendedmediatek,micbias0-microvoltmediatek,micbias1-microvolt#io-channel-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-enable-ramp-delayregulator-always-onlinux,keycodeswakeup-sourcestatusmediatek,larbs#iommu-cellsdma-requests#dma-cellsdmasdma-namespinctrl-0pinctrl-names#pwm-cellsclock-divphysdr_modemaximum-speedusb-role-switchvusb33-supplyid-gpiosvbus-supplyassigned-clock-parentsassigned-clocksbus-widthcap-mmc-highspeedcap-mmc-hw-reseths400-ds-delaymax-frequencymmc-hs200-1_8vmmc-hs400-1_8vno-sdno-sdionon-removablepinctrl-1vmmc-supplyvqmmc-supplycap-sd-highspeedcd-gpiossd-uhs-sdr104sd-uhs-sdr50mediatek,pericfgphy-handlephy-mode#phy-cellspower-domainsmediatek,larb-id#sound-dai-cellsmediatek,dmic-modeserial0stdout-pathlabellinux,codedebounce-intervalgpioenable-active-highno-mappinctrl-2pinctrl-3pinctrl-4pinctrl-5mediatek,platform