8( "` ,Xiaomi Redmi 5 Plus2xiaomi,vinceqcom,msm8953=handsetJ%V chosenclockssleep-clk 2fixed-clockdqxo-board 2fixed-clockdq$xocpus cpu@0cpu2arm,cortex-a53pscicpu@1cpu2arm,cortex-a53pscicpu@2cpu2arm,cortex-a53pscicpu@3cpu2arm,cortex-a53pscicpu@100cpu2arm,cortex-a53pscicpu@101cpu2arm,cortex-a53psci cpu@102cpu2arm,cortex-a53psci cpu@103cpu2arm,cortex-a53psci cpu-mapcluster0core0core1core2core3cluster1core0core1 core2 core3 l2-cache-02cachel2-cache-12cachefirmwarescm2qcom,scm-msm8953qcom,scm z y xcorebusifacememory@10000000memorypmu2arm,cortex-a53-pmu +psci 2arm,psci-1.0smcremoteproc$2qcom,msm8953-rpm-procqcom,rpm-procsmd-edge +6 =rpm-requests2qcom,rpm-msm8953qcom,smd-rpm Krpm_requestsclock-controller2qcom,rpmcc-msm8953qcom,rpmcc xodpower-controller2qcom,msm8953-rpmpd]q3opp-table2operating-points-v2opp1opp2 opp30'opp4@(opp5)opp6*opp7+opp8@,opp9-regulators2qcom,rpm-pm8953-regulators/Qs1o Fps3o@s4oGl1oB@l2oO(l3oHHl5ow@w@Cl6ow@w@Xl7ow@l8o,@ ,@ Bl9o-2Zl10o+|+|Ul11o-p-pMl12ow@-pNl13o//l16ow@w@l17o)0+|l19oOl22o**l23oO(reserved-memory zap@818000002shared-dma-pool &smem@86300000 2qcom,smem0reserved@86400000@@mpss@86c000007adsp@8d600000` udfps-data@90000000cont-splash@90001000jɀvenus@91400000@pmba@920000006rmtfs@f2d000002qcom,rmtfs-memqseecom@84a00000wcnss@8e800000pnramoops@9ff000002ramoopssmp2p-adsp 2qcom,smp2p +#6 master-kernel-master-kernel=vslave-kernel -slave-kernelTitsmp2p-modem 2qcom,smp2p +6 master-kernel-master-kernel=4slave-kernel -slave-kernelTi2smp2p-wcnss 2qcom,smp2p +6 master-kernel-master-kernel=pslave-kernel -slave-kernelTiosmsm 2qcom,smsm 6 apps@0=smodem@1 +Tiwcnss@6 +Tisoc@0  2simple-bussram@600002qcom,rpm-msg-ramphy@790002qcom,msm8953-qusb2-phyz  cfg_ahbref okay8rng@e3000 2qcom,prng0 corethermal-sensor@4a9000!2qcom,msm8953-tsensqcom,tsens-v2JJ+:uplowcriticalwrestart@4ab000 2qcom,psholdJpinctrl@10000002qcom,msm8953-pinctrl0 +$Ti0uart-console-active-state Egpio4gpio5 Jblsp_uart2SbOuart-console-sleep-state Egpio4gpio5 Jblsp_uart2Sosdc1-clk-on-state Esdc1_clkbS:sdc1-clk-off-state Esdc1_clkbS>sdc1-cmd-on-state Esdc1_cmdbS ;sdc1-cmd-off-state Esdc1_cmdbS?sdc1-data-on-state Esdc1_data~S <sdc1-data-off-state Esdc1_data~S@sdc1-rclk-on-state Esdc1_rclko=sdc1-rclk-off-state Esdc1_rclkoAsdc2-clk-on-state Esdc2_clkSbEsdc2-clk-off-state Esdc2_clkbSIsdc2-cmd-on-state Esdc2_cmd~S Fsdc2-cmd-off-state Esdc2_cmd~SJsdc2-data-on-state Esdc2_data~S Gsdc2-data-off-state Esdc2_data~SKcd-on-stateEgpio133JgpioS~Hcd-off-stateEgpio133JgpioSbLgpio-key-default-stateEgpio85JgpioS~i2c-1-default-state Egpio2gpio3 Jblsp_i2c1SbQi2c-1-sleep-state Egpio2gpio3JgpioSbRi2c-2-default-state Egpio6gpio7 Jblsp_i2c2SbSi2c-2-sleep-state Egpio6gpio7JgpioSbTi2c-3-default-stateEgpio10gpio11 Jblsp_i2c3SbVi2c-3-sleep-stateEgpio10gpio11JgpioSbWi2c-4-default-stateEgpio14gpio15 Jblsp_i2c4Sb`i2c-4-sleep-stateEgpio14gpio15JgpioSbai2c-5-default-stateEgpio18gpio19 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