]j8U(U  ,LG G4 (H815)2lg,h815qcom,msm8992=handsetJV  c daliasesq/soc@0/mmc@f9824900v/soc@0/mmc@f98a4900chosenclocksxo-board 2fixed-clock{$ xo_boardsleep-clk 2fixed-clock{ sleep_clkcpus cpu@0cpu2arm,cortex-a53 spin-tablel2-cache2cachecpu@1cpu2arm,cortex-a53 spin-tablecpu@2cpu2arm,cortex-a53 spin-tablecpu@3cpu2arm,cortex-a53 spin-tablecpu@100cpu2arm,cortex-a57 spin-tablel2-cache2cachecpu@101cpu2arm,cortex-a57 spin-table cpu-mapcluster0core0core1core2core3cluster1core0core1 firmwarescm2qcom,scm-msm8994qcom,scmmemory@80000000memorypmu2arm,cortex-a53-pmu remoteproc$2qcom,msm8994-rpm-procqcom,rpm-procsmd-edge   rpm-requests2qcom,rpm-msm8994qcom,smd-rpm 0rpm_requestsclock-controller2qcom,rpmcc-msm8992qcom,rpmcc{Gpower-controller2qcom,msm8994-rpmpdBV opp-table2operating-points-v2 opp1jopp2jopp3jopp4jopp5jopp6jregulators-02qcom,rpm-pm8994-regulatorst      +BZl~s3  s4w@w@s5 p pl13w@-pU)l20-p-p l21-p-p 5(regulators-12qcom,rpm-pmi8994-regulators  s1 boost-bypass06reserved-memory 1smem@6a00000 8memory@70000008memory@ca00000 8memory@c64000002qcom,rmtfs-mem@8?memory@c6700000p8memory@c70000008memory@c9400000@8reserved@6c00000@8spin-table@60000008ramoops@ff000002ramoopsN[eqfb@3400000@8crash-fb@40000008smem 2qcom,smemzsmp2p-lpass 2qcom,smp2p   master-kernelmaster-kernelslave-kernel slave-kernelsmp2p-modem 2qcom,smp2p   master-kernelmaster-kernelslave-kernel slave-kernelsoc@0 1 2simple-businterrupt-controller@f90000002qcom,msm-qgic2 mailbox@f900d000%2qcom,msm8994-apcs-kpss-globalsyscon  watchdog@f9017000$2qcom,apss-wdt-msm8994qcom,kpss-wdtp timer@f9020000 12arm,armv7-timer-memframe@f9021000&  frame@f9023000&  0 3disabledframe@f9024000&  @ 3disabledframe@f9025000&  P 3disabledframe@f9026000&  ` 3disabledframe@f9027000& p 3disabledframe@f9028000&  3disabledusb@f92f88002qcom,msm8994-dwc3qcom,dwc3/ 1 rms:coreifacesleepmock_utmiFsrV$'kyusb@f9200000 2snps,dwc3   high-speed peripheralmmc@f9824900%2qcom,msm8994-sdhciqcom,sdhci-msm-v4I@hccore{hc_irqpwr_irqvh:ifacecorexodefaultsleep#3okay1@ Lmmc@f98a4900%2qcom,msm8994-sdhciqcom,sdhci-msm-v4I@hccore}hc_irqpwr_irqi:ifacecorexodefaultsleep !"# $%& Y'3okay@(L)dma-controller@f99040002qcom,bam-v1.7.0@ ::bam_clkbmu,serial@f991e000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm l :coreifaceH:defaultsleep*+ 3disabledi2c@f99230002qcom,i2c-qup-v2.2.10 _;: :coreiface, , txrxdefaultsleep-.  3disabledspi@f99230002qcom,spi-qup-v2.2.10 _<: :coreiface, , txrxdefaultsleep/0  3disabledi2c@f99240002qcom,i2c-qup-v2.2.1@ `=: :coreiface,,txrxdefaultsleep12  3disabledi2c@f99260002qcom,i2c-qup-v2.2.1` bA: :coreiface,,txrxdefaultsleep34  3disabledi2c@f99270002qcom,i2c-qup-v2.2.1p cC: :coreiface55txrxdefaultsleep67  3disabledi2c@f99280002qcom,i2c-qup-v2.2.1 dE: :coreiface,,txrxdefaultsleep89  3disableddma-controller@f99440002qcom,bam-v1.7.0@ M:bam_clkbmu5serial@f995e000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm r :coreiface[M55txrxdefaultsleep:; 3disabledi2c@f99630002qcom,i2c-qup-v2.2.10 eNM :coreiface5 5 txrxdefaultsleep<=  3disabledspi@f99660002qcom,spi-qup-v2.2.1` hUM :coreiface55txrxdefaultsleep>?  3disabledi2c@f99670002qcom,i2c-qup-v2.2.1p iVM :coreifacej55txrxdefaultsleep@A  3disabledclock-controller@fc4000002qcom,gcc-msm8992{B@  :xosleepsram@fc4280002qcom,rpm-msg-ramB@restart@fc4ab000 2qcom,psholdJspmi@fc4cf0002qcom,spmi-pmic-arbLLLcoreintrcnfg periph_irq m pmic@02qcom,pm8994qcom,spmi-pmic rtc@60002qcom,pm8941-rtc`a rtcalarmapon@8002qcom,pm8916-ponpwrkey2qcom,pm8941-pwrkey= tresin2qcom,pm8941-resin= 3okayrtemp-alarm@24002qcom,spmi-temp-alarm$$Bthermal-Iadc@31002qcom,spmi-vadc11 CBchannel@7Ufvph_pwrchannel@8 fdie_tempchannel@9  fref_625mvchannel@a  fref_1250mvchannel@echannel@fgpio@c000 2qcom,pm8994-gpioqcom,spmi-gpiol|''mpps@a0002qcom,pm8994-mppqcom,spmi-mppl|CCpmic@12qcom,pm8994qcom,spmi-pmic pwm2qcom,pm8994-lpg  3disabledregulators2qcom,pm8994-regulatorspmic@22qcom,pmi8994qcom,spmi-pmic gpio@c000!2qcom,pmi8994-gpioqcom,spmi-gpiol|D Dmpps@a0002qcom,pmi8994-mppqcom,spmi-mppl|EEpmic@32qcom,pmi8994qcom,spmi-pmic pwm2qcom,pmi8994-lpg  3disabledregulators2qcom,pmi8994-regulatorswled@d8002qcom,pmi8994-wled  ovpshort fbacklight 3disabledhwlock@fd484000(2qcom,msm8994-tcsr-mutexqcom,tcsr-mutexH@pinctrl@fd5100002qcom,msm8992-pinctrlQ@ l|FFblsp1-uart2-default-state gpio4gpio5 blsp_uart2*blsp1-uart2-sleep-state gpio4gpio5gpio+blsp2-uart2-default-stategpio45gpio46gpio47gpio48 blsp_uart8:blsp2-uart2-sleep-stategpio45gpio46gpio47gpio48gpio;i2c1-default-state gpio2gpio3 blsp_i2c1-i2c1-sleep-state gpio2gpio3gpio.i2c2-default-state gpio6gpio7 blsp_i2c21i2c2-sleep-state gpio6gpio7gpio2i2c4-default-stategpio19gpio20 blsp_i2c43i2c4-sleep-stategpio19gpio20gpio4i2c5-default-stategpio23gpio24 blsp_i2c56i2c5-sleep-stategpio23gpio24gpio7i2c6-default-stategpio28gpio27 blsp_i2c68i2c6-sleep-stategpio28gpio27gpio9i2c7-default-stategpio44gpio43 blsp_i2c7<i2c7-sleep-stategpio44gpio43gpio=blsp2-spi10-default-state>default-pinsgpio53gpio54gpio55 blsp_spi10 cs-pinsgpio67gpioblsp2-spi10-sleep-stategpio53gpio54gpio55gpio?i2c11-default-stategpio83gpio84 blsp_i2c11@i2c11-sleep-stategpio83gpio84gpioAblsp1-spi1-default-state/default-pinsgpio0gpio1gpio3 blsp_spi1 cs-pinsgpio8gpioblsp1-spi1-sleep-stategpio0gpio1gpio3gpio0clk-on-state sdc1_clkclk-off-state sdc1_clkcmd-on-state sdc1_cmdcmd-off-state sdc1_cmddata-on-state sdc1_datadata-off-state sdc1_datarclk-on-state sdc1_rclkrclk-off-state sdc1_rclksdc2-clk-on-state sdc2_clk !sdc2-clk-off-state sdc2_clk$sdc2-cmd-on-state sdc2_cmd "sdc2-cmd-off-state sdc2_cmd%sdc2-data-on-state sdc2_data #sdc2-data-off-state sdc2_data&hall-sensor-default-stategpio75gpioJclock-controller@fd8c00002qcom,mmcc-msm8992R{BY:xogpll0mmssnoc_ahboxili_gfx3d_clk_srcdsi0plldsi0pllbytedsi1plldsi1pllbytehdmipll0GG (FHHHHH V/0)<98p/Hsram@fdd000002qcom,msm8974-ocmem  ctrlmem 1 G"Hr :coreiface gmu-sram@0timer2arm,armv8-timer0vph-pwr-regulator2regulator-fixedvph_pwr66 thermal-zonespm8994-thermal&<Itripspm8994-alert0LsXEpassivepm8994-critLHX Ecriticalgpio-hall-sensor 2gpio-keysJdefaultfHall Effect Sensorevent-hall-sensor \FKfhall effect sensorctgpio-keys 2gpio-keyskey-vol-up fvolume up \'s interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typeqcom,msm-idqcom,pmic-idqcom,board-idmmc1mmc2#clock-cellsclock-frequencyclock-output-namesphandledevice_typeregenable-methodnext-level-cachecache-levelcache-unifiedcpuinterruptsmboxesqcom,smd-edgeqcom,remote-pidqcom,smd-channels#power-domain-cellsoperating-points-v2opp-levelvdd_s3-supplyvdd_s4-supplyvdd_s5-supplyvdd_s7-supplyvdd_l1-supplyvdd_l2_26_28-supplyvdd_l3_11-supplyvdd_l4_27_31-supplyvdd_l5_7-supplyvdd_l6_12_32-supplyvdd_l8_16_30-supplyvdd_l9_10_18_22-supplyvdd_l13_19_23_24-supplyvdd_l14_15-supplyvdd_l17_29-supplyvdd_l20_21-supplyvdd_l25-supplyvdd_lvs1_2-supplyregulator-min-microvoltregulator-max-microvoltregulator-system-loadregulator-allow-set-loadvdd_s1-supplyvdd_bst_byp-supplyrangesno-mapqcom,client-idconsole-sizepmsg-sizerecord-sizeecc-sizememory-regionqcom,rpm-msg-ramhwlocksqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cells#mbox-cellsclockstimeout-secframe-numberstatusclock-namesassigned-clocksassigned-clock-ratespower-domainsqcom,select-utmi-as-pipe-clksnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkmaximum-speeddr_modereg-namesinterrupt-namespinctrl-namespinctrl-0pinctrl-1bus-widthnon-removablemmc-hs400-1_8vvmmc-supplyvqmmc-supplycd-gpios#dma-cellsqcom,eeqcom,controlled-remotelynum-channelsqcom,num-eesdmasdma-names#reset-cellsqcom,channelmode-bootloadermode-recoverydebouncebias-pull-uplinux,codeio-channelsio-channel-names#thermal-sensor-cells#io-channel-cellsqcom,pre-scalinglabelgpio-controllergpio-ranges#gpio-cells#pwm-cellsqcom,cabcqcom,external-pfet#hwlock-cellspinsfunctiondrive-strengthbias-disablebias-pull-downregulator-nameregulator-always-onpolling-delay-passivethermal-sensorstemperaturehysteresislinux,input-typelinux,can-disablewakeup-sourcedebounce-interval