P8(T ,Motorola G7 Power2motorola,oceanqcom,sdm632=handsetJ]VAd%chosen qframebuffer@900010002simple-framebufferx2|pr8g8b88clockssleep-clk 2fixed-clockxo-board 2fixed-clock$xocpus cpu@0cpu 2qcom,kryo250xpsci"cpu@1cpu 2qcom,kryo250xpsci"cpu@2cpu 2qcom,kryo250xpsci"cpu@3cpu 2qcom,kryo250xpsci"cpu@100cpu 2qcom,kryo250xpsci" cpu@101cpu 2qcom,kryo250xpsci" cpu@102cpu 2qcom,kryo250xpsci" cpu@103cpu 2qcom,kryo250xpsci" cpu-mapcluster0core01core11core21core31cluster1core01 core11 core21 core31 l2-cache-02cache5Al2-cache-12cache5Afirmwarescm2qcom,scm-msm8953qcom,scmzyxOcorebusiface[memory@10000000memoryxpmu2arm,cortex-a53-pmu hpsci 2arm,psci-1.0smcremoteproc$2qcom,msm8953-rpm-procqcom,rpm-procsmd-edge hs zrpm-requests2qcom,rpm-msm8953qcom,smd-rpm rpm_requestsclock-controller2qcom,rpmcc-msm8953qcom,rpmccOxopower-controller2qcom,msm8953-rpmpd1opp-table2operating-points-v2opp1opp2 opp30'opp4@(opp5)opp6*opp7+opp8@,opp9-regulators2qcom,rpm-pm8953-regulators ,s3Jbs4Jb l1Jbl2Jbl3JHbHzl5Jw@bw@Al6Jw@bw@l7Jw@bl8J,@ b,@ @l9J-b2Zl10J*b-l11J-pb-pKl12Jw@b-pLl13J/b/l16Jw@bw@l17J+|b+|l18Jw@b)2l19JObpl22Jw@bw@l23Jb(reserved-memory qzap@818000002shared-dma-poolx &smem@86300000 2qcom,smemx0reserved@86400000x@@mpss@86c00000x5adsp@8d600000x`lwcnss@8e700000xppedfps-data@90000000xcont-splash@90001000x2venus@91400000x@pmba@92000000x4rmtfs@f2d000002qcom,rmtfs-memxqseecom@84300000x0reserved@eefa1800xramoops@ef0000002ramoopsx smp2p-adsp 2qcom,smp2p  h#s $master-kernel4master-kernelDmslave-kernel 4slave-kernel[pksmp2p-modem 2qcom,smp2p  hs $master-kernel4master-kernelD2slave-kernel 4slave-kernel[p0smp2p-wcnss 2qcom,smp2p  hs $master-kernel4master-kernelDgslave-kernel 4slave-kernel[pfsmsm 2qcom,smsm s apps@0xDjmodem@1x h[pwcnss@6x h[psoc@0 q 2simple-bussram@600002qcom,rpm-msg-ramxphy@790002qcom,msm8953-qusb2-phyx Ocfg_ahbrefokay6rng@e3000 2qcom,prngx0Ocorethermal-sensor@4a9000!2qcom,msm8953-tsensqcom,tsens-v2xJJh:uplowcriticalnrestart@4ab000 2qcom,psholdxJpinctrl@10000002qcom,msm8953-pinctrlx0 h+[p7`uart-console-active-state Lgpio4gpio5 Qblsp_uart2Ziuart-console-sleep-state Lgpio4gpio5 Qblsp_uart2Zvsdc1-clk-on-state Lsdc1_clkiZ8sdc1-clk-off-state Lsdc1_clkiZ<sdc1-cmd-on-state Lsdc1_cmdiZ 9sdc1-cmd-off-state Lsdc1_cmdiZ=sdc1-data-on-state Lsdc1_dataZ :sdc1-data-off-state Lsdc1_dataZ>sdc1-rclk-on-state Lsdc1_rclkv;sdc1-rclk-off-state Lsdc1_rclkv?sdc2-clk-on-state Lsdc2_clkZiCsdc2-clk-off-state Lsdc2_clkiZGsdc2-cmd-on-state Lsdc2_cmdZ Dsdc2-cmd-off-state Lsdc2_cmdZHsdc2-data-on-state Lsdc2_dataZ Esdc2-data-off-state Lsdc2_dataZIcd-on-stateLgpio133QgpioZFcd-off-stateLgpio133QgpioZiJgpio-key-default-stateLgpio85QgpioZxi2c-1-default-state Lgpio2gpio3 Qblsp_i2c1ZiNi2c-1-sleep-state Lgpio2gpio3QgpioZiOi2c-2-default-state Lgpio6gpio7 Qblsp_i2c2ZiPi2c-2-sleep-state Lgpio6gpio7QgpioZiQi2c-3-default-stateLgpio10gpio11 Qblsp_i2c3ZiRi2c-3-sleep-stateLgpio10gpio11QgpioZiSi2c-4-default-stateLgpio14gpio15 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