ۈ8(  ,prt,mecsbcrockchip,rk35687Protonic MECSBCaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe310000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55 psci/<@N[h@z cpu@100cpu,arm,cortex-a55 psci/<@N[h@z cpu@200cpu,arm,cortex-a55 psci/<@N[h@z cpu@300cpu,arm,cortex-a55 psci/<@N[h@z l3-cache,cache1>@Popp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0opp-1992000000v 000display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc protocol@14opp-table-1,operating-points-v2@opp-200000000  8opp-300000000 8opp-400000000ׄ 8opp-600000000#F opp-700000000)'~opp-800000000/B@hdmi-sound,simple-audio-card&HDMI=i2sV pdisabledsimple-audio-card,codecwsimple-audio-card,cpuw pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _  sata-phy% pdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob `  sata-phy% pdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clk3host ;utmi_wide%DKpokay  usb2-phyusb3-phydusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clk3host  usb2-phyusb3-phy ;utmi_wide%DKpokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  kA(usb@fd800000 ,generic-ehci  usbpokayusb@fd840000 ,generic-ohci  usbpokayusb@fd880000 ,generic-ehci  usbpokayusb@fd8c0000 ,generic-ohci  usbpokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdVio-domains&,rockchip,rk3568-pmu-io-voltage-domainpokay %syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru3clock-controller@fdd20000,rockchip,rk3568-cruxin24m3@ PG e|i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclkdefault pokayregulator@60 ,fcs,fan53555`vdd_cpu 50 regulator-state-mem serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclk9 !default>K pdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk"defaultU pdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk#defaultUpokaypwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk$defaultUpokaypwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk%defaultU pdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller` power-domain@7t&`power-domain@8 t'()`power-domain@9  t*+,`power-domain@10 t-./012`power-domain@11 t3`power-domain@13 t4`power-domain@14 t567`power-domain@15 t89:;<=>?`gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' {jobmmugpugpubus@%pokayAvideo-codec@fdea0400,rockchip,rk3568-vpu {vdpu aclkhclkB% iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface% Brga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ZaclkhclksclkD&$% coreaxiahb% video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclkC% iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface% Cmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleрDreset pdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a {macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refD stmmaceth|DEFpokay@e G +rgmii-id4outputdefaultHIJKLMmdio,snps,dwmac-mdio ethernet-phy@2,ethernet-phy-ieee802.3-c22defaultNAN Q cO Gstmmac-axi-configoyDrx-queues-configEqueue0tx-queues-configFqueue0vop@fe040000 0@vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2P% | pdisabled,rockchip,rk3568-vopports port@0 port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface%  pdisabledPdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi Dpclk dphyQ% apbD| pdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi Epclk dphyR% apbD| pdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefdefault STU% >| pdisabledports port@0port@1qos@fe128000,rockchip,rk3568-qossyscon &qos@fe138080,rockchip,rk3568-qossyscon 5qos@fe138100,rockchip,rk3568-qossyscon 6qos@fe138180,rockchip,rk3568-qossyscon 7qos@fe148000,rockchip,rk3568-qossyscon 'qos@fe148080,rockchip,rk3568-qossyscon (qos@fe148100,rockchip,rk3568-qossyscon )qos@fe150000,rockchip,rk3568-qossyscon 3qos@fe158000,rockchip,rk3568-qossyscon -qos@fe158100,rockchip,rk3568-qossyscon .qos@fe158180,rockchip,rk3568-qossyscon /qos@fe158200,rockchip,rk3568-qossyscon 0qos@fe158280,rockchip,rk3568-qossyscon 1qos@fe158300,rockchip,rk3568-qossyscon 2qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon 8qos@fe190280,rockchip,rk3568-qossyscon <qos@fe190300,rockchip,rk3568-qossyscon =qos@fe190380,rockchip,rk3568-qossyscon >qos@fe190400,rockchip,rk3568-qossyscon ?qos@fe198000,rockchip,rk3568-qossyscon 4qos@fe1a8000,rockchip,rk3568-qossyscon *qos@fe1a8080,rockchip,rk3568-qossyscon +qos@fe1a8100,rockchip,rk3568-qossyscon ,dfi@fe230000,rockchip,rk3568-dfi#  Vpcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHG{syspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci` WWWW)8GV^  pcie-phy%T @@Dpipe pokaydefaultX cYlegacy-interrupt-controllerk HWmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleрDresetpokayhr Zdefault[\]^mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleрDreset pdisabledspi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfc_default pdisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 @{}P n6(|zy{}corebusaxiblocktimerpokayh default`abcrng@fe388000,rockchip,rk3568-rng8@po coreahbDmpokayi2s@fe400000,rockchip,rk3568-i2s-tdm@ 4@=APFqFq?C9mclk_txmclk_rxhclk9dtxDPQ tx-mrx-m| pdisabled i2s@fe410000,rockchip,rk3568-i2s-tdmA 5@EIPFqFqGK:mclk_txmclk_rxhclk9ddrxtxDRS tx-mrx-m|defaultefghpokayi2s@fe420000,rockchip,rk3568-i2s-tdmB 6@MPFqOO;mclk_txmclk_rxhclk9ddtxrxDTtx-m|defaultijkl pdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclk9ddtxrxDUV tx-mrx-m| pdisabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclk9d rxmnopqrdefaultDXpdm-m pdisabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\9dtxdefaults pdisableddma-controller@fe530000,arm,pl330arm,primecellS@   apb_pclk2 dma-controller@fe550000,arm,pl330arm,primecellU@  apb_pclk2di2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclktdefault  pdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclkudefault pokayi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclkvdefault pokayamplifier@4c ,ti,tas2562L =wwdefaultxLi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclkydefault  pdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclkzdefault pokaytemperature-sensor@48 ,ti,tmp1075Hrtc@51 ,nxp,pcf85363Q rtcic_32koutwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclk9  txrxdefault {|}  pdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclk9  txrxdefault ~  pdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclk9  txrxdefault   pdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclk9  txrxdefault   pdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclk9  default>K pdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclk9  default>Kpokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclk9  default>K pdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclk9  default>K pdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclk9 default>K pdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclk9 default>K pdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclk9  default>K pdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclk9  default>K pdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclk9  default>K pdisabledthermal-zonescpu-thermal\drtripscpu_alert0ppassivecpu_alert1$passivecpu_crits criticalcooling-mapsmap00 gpu-thermal\rtripsgpu-thresholdppassivegpu-target$passivegpu-crits criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq s@Pf@ `tsadcapb_pclkD|sdefaultsleeppokay saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclkD saradc-apb $pokay 6pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultU pdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultU pdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultU pdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefaultU pdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultU pdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultU pdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaultU pdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefaultU pdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultU pdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultU pdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefaultU pdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefaultU pdisabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe@"PD B T jpokayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe@%PD B T jpokayphy@fe870000,rockchip,rk3568-csi-dphyypclk jDapb| pdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz j% apbD pdisabledQmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ j% apbD pdisabledRusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m  upokayhost-port jpokayotg-port jpokayusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m  upokayhost-port jpokayotg-port jpokaypinctrl,rockchip,rk3568-pinctrl|V gpio@fdd60000,rockchip,gpio-bank !.    kZgpio@fe740000,rockchip,gpio-bankt "cd   kwgpio@fe750000,rockchip,gpio-banku #ef  @  kgpio@fe760000,rockchip,gpio-bankv $gh  `  kYgpio@fe770000,rockchip,gpio-bankw %ij   kOpcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  acodecaudiopwmbt656bt1120camcan0can0m0-pins  can1can1m1-pins can2can2m0-pins   cifclk32kclk32k-out0 cpuebcedpdpemmcemmc-bus8   `emmc-clk aemmc-cmd bemmc-datastrobe ceth0eth1flashfspifspi-pins` _gmac0gmac1gmac1m1-miim Hgmac1m1-clkinout Lgmac1m1-rx-bus20  Jgmac1m1-tx-bus20 Igmac1m1-rgmii-clk Kgmac1m1-rgmii-bus@ Mgpuhdmitxhdmitxm0-cec Uhdmitx-scl Shdmitx-sda Ti2c0i2c0-xfer  i2c1i2c1-xfer  ti2c2i2c2m0-xfer ui2c3i2c3m0-xfer vi2c4i2c4m0-xfer   yi2c5i2c5m0-xfer   zi2s1i2s1m0-lrcktx fi2s1m0-sclktx ei2s1m0-sdi0  gi2s1m0-sdo0 hi2s2i2s2m0-lrcktx ji2s2m0-sclktx ii2s2m0-sdi ki2s2m0-sdo li2s3ispjtaglcdcmcunpupcie20pcie20m1-pins0 Xpcie30x1pcie30x2pcie30x2m1-pins0 pdmpdmm0-clk mpdmm0-clk1 npdmm0-sdi0  opdmm0-sdi1  ppdmm0-sdi2  qpdmm0-sdi3 rpmicpmupwm0pwm0m0-pins "pwm1pwm1m0-pins #pwm2pwm2m0-pins $pwm3pwm3-pins %pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ [sdmmc0-clk \sdmmc0-cmd ]sdmmc0-det ^sdmmc1sdmmc2spdifspdifm0-tx sspi0spi0m0-pins0 }spi0m0-cs0 {spi0m0-cs1 |spi1spi1m0-pins0  spi1m0-cs0 ~spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer !uart1uart1m0-xfer   uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2etherneteth-phy1-rst  Ntas2562tas2562 xsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ^  sata-phy% pdisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon 9qos@fe190100,rockchip,rk3568-qossyscon :qos@fe190200,rockchip,rk3568-qossyscon ;syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy j&'wrefclk_mrefclk_npclkDphy pokaypcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<{syspmcmsglegacyerr` )8GV^  pcie-phy%0@@'T @@@dbiapbconfigDpipe pdisabledlegacy-interrupt-controllerk pcie@fe280000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<{syspmcmsglegacyerr` )8GV ^  pcie-phy%0@(T @@dbiapbconfigDpipepokaydefault c legacy-interrupt-controllerk ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*{macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refD stmmaceth| pdisabledmdio,snps,dwmac-mdio stmmac-axi-configoyrx-queues-configqueue0tx-queues-configqueue0can@fe5700000,rockchip,rk3568v3-canfdrockchip,rk3568v2-canfdW A@ baudpclkDUT coreapbdefaultpokaycan@fe5800000,rockchip,rk3568v3-canfdrockchip,rk3568v2-canfdX CB baudpclkDWV coreapbdefaultpokaycan@fe590000,rockchip,rk3568v2-canfdY ED baudpclkDYX coreapbdefault pdisabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe@PD B T jpokaychosen serial2:1500000n8tas2562-sound,simple-audio-card=i2s&SpeakerVsimple-audio-card,cpuwsimple-audio-card,codecwregulator-vdd-gpu,pwm-regulator &vdd_gpu 8B@ + IdAregulator-p3v3,regulator-fixedp3v32Z2Zregulator-p1v8,regulator-fixedp1v8w@w@regulator-sd,regulator-gpio ]Z j iZsdcard-gpio-supplyw@2Z }w@2Zregulator-vdd-npu,pwm-regulator &vdd_npu 8B@ + Id interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspenddmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-handlephy-modeclock_in_outreset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-names#sound-dai-cellsrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removablemmc-hs200-1_8vno-sdno-sdiodma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsshutdown-gpiosti,imon-slot-nopolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfvpcie3v3-supplystdout-pathpwmsregulator-settling-time-up-uspwm-dutycycle-rangeenable-gpiosenable-active-highstates