?8( # ',friendlyarm,nanopi-r5crockchip,rk35687FriendlyElec NanoPi R5Caliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55 psci/<@N[h@z cpu@100cpu,arm,cortex-a55 psci/<@N[h@z cpu@200cpu,arm,cortex-a55 psci/<@N[h@z cpu@300cpu,arm,cortex-a55 psci/<@N[h@z l3-cache,cache1>@Popp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0opp-1992000000v 000display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc protocol@14opp-table-1,operating-points-v2Fopp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-card&HDMI=i2sVpokaysimple-audio-card,codecwsimple-audio-card,cpuw pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _  sata-phy% pdisabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob `  sata-phy% pdisabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clk3host ;utmi_wide%DKpokay  usb2-phyusb3-phydusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clk3host  usb2-phyusb3-phy ;utmi_wide%DKpokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  kA(usb@fd800000 ,generic-ehci  usbpokayusb@fd840000 ,generic-ohci  usbpokayusb@fd880000 ,generic-ehci  usbpokayusb@fd8c0000 ,generic-ohci  usbpokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdXio-domains&,rockchip,rk3568-pmu-io-voltage-domainpokay syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru%clock-controller@fdd20000,rockchip,rk3568-cruxin24m%2 BG Wn i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk!default pokayregulator@1c ,tcs,tcs4525{vdd_cpu 50"regulator-state-mempmic@20,rockchip,rk809 #default$6W%c%o%{%%%%%%regulatorsDCDC_REG1 vdd_logic pqregulator-state-memDCDC_REG2vdd_gpu pqGregulator-state-memDCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-memDCDC_REG5vcc_1v8w@w@regulator-state-memLDO_REG1vdda0v9_image~~Tregulator-state-memLDO_REG2 vdda_0v9  regulator-state-memLDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-memLDO_REG5 vccio_sdw@2Zregulator-state-memLDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem2ZLDO_REG7 vcca_1v8w@w@regulator-state-memLDO_REG8 vcca1v8_pmuw@w@regulator-state-memw@LDO_REG9vcca1v8_imagew@w@Uregulator-state-memSWITCH_REG1vcc_3v3regulator-state-memSWITCH_REG2 vcc3v3_sd\regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclk&&'default!. pdisabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(default8 pdisabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk)default8 pdisabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*default8 pdisabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk+default8 pdisabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllerC power-domain@7W,Cpower-domain@8 W-./Cpower-domain@9  W012Cpower-domain@10 W345678Cpower-domain@11 W9Cpower-domain@13 W:Cpower-domain@14 W;<=Cpower-domain@15 W>?@ABCDECgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' ^jobmmugpugpubusF%pokaynGvideo-codec@fdea0400,rockchip,rk3568-vpu ^vdpu aclkhclkzH% iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface% Hrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ZaclkhclksclkD&$% coreaxiahb% video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclkzI% iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface% Immc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleрDreset pdisabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a ^macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refD stmmacethn JKL pdisabledmdio,snps,dwmac-mdio stmmac-axi-config Jrx-queues-config-Kqueue0tx-queues-configCLqueue0vop@fe040000 0@Yvopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2zM% n pokay,rockchip,rk3568-vop2Wports port@0 endpoint@2cNVport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface% pokayMdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi Dpclk dphyO% apbDn  pdisabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi Epclk dphyP% apbDn  pdisabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefdefault QRS% !n spokayTUports port@0endpointcVNport@1endpointcWqos@fe128000,rockchip,rk3568-qossyscon ,qos@fe138080,rockchip,rk3568-qossyscon ;qos@fe138100,rockchip,rk3568-qossyscon <qos@fe138180,rockchip,rk3568-qossyscon =qos@fe148000,rockchip,rk3568-qossyscon -qos@fe148080,rockchip,rk3568-qossyscon .qos@fe148100,rockchip,rk3568-qossyscon /qos@fe150000,rockchip,rk3568-qossyscon 9qos@fe158000,rockchip,rk3568-qossyscon 3qos@fe158100,rockchip,rk3568-qossyscon 4qos@fe158180,rockchip,rk3568-qossyscon 5qos@fe158200,rockchip,rk3568-qossyscon 6qos@fe158280,rockchip,rk3568-qossyscon 7qos@fe158300,rockchip,rk3568-qossyscon 8qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon >qos@fe190280,rockchip,rk3568-qossyscon Bqos@fe190300,rockchip,rk3568-qossyscon Cqos@fe190380,rockchip,rk3568-qossyscon Dqos@fe190400,rockchip,rk3568-qossyscon Eqos@fe198000,rockchip,rk3568-qossyscon :qos@fe1a8000,rockchip,rk3568-qossyscon 0qos@fe1a8080,rockchip,rk3568-qossyscon 1qos@fe1a8100,rockchip,rk3568-qossyscon 2dfi@fe230000,rockchip,rk3568-dfi#  Xpcie@fe260000,rockchip,rk3568-pcie0@&Ydbiapbconfig<KJIHG^syspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci`YYYY "  pcie-phy%T @@Dpipe pokaydefaultZ ,[legacy-interrupt-controllerk HYmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleрDresetpokay8@GQct\default]^_`mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleрDreset pdisabledspi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfcadefault pdisabledmmc@fe310000,rockchip,rk3568-dwcmshc1 2{}B n6(|zy{}corebusaxiblocktimerpokayG default bcdrng@fe388000,rockchip,rk3568-rng8@po coreahbDmpokayi2s@fe400000,rockchip,rk3568-i2s-tdm@ 42=ABFqFq?C9mclk_txmclk_rxhclketxDPQ tx-mrx-mn spokay i2s@fe410000,rockchip,rk3568-i2s-tdmA 52EIBFqFqGK:mclk_txmclk_rxhclkeerxtxDRS tx-mrx-mn default0fghijklmnopqs pdisabledi2s@fe420000,rockchip,rk3568-i2s-tdmB 62MBFqOO;mclk_txmclk_rxhclkeetxrxDTtx-mn defaultrstus pdisabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclkeetxrxDUV tx-mrx-mn s pdisabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclke rxvwxyz{defaultDXpdm-ms pdisabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\etxdefault|s pdisableddma-controller@fe530000,arm,pl330arm,primecellS@   apb_pclk&dma-controller@fe550000,arm,pl330arm,primecellU@  apb_pclkei2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclk}default  pdisabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclk~default  pdisabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclkdefault  pdisabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclkdefault  pdisabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclkdefault pokayrtc@51,haoyu,hym8563Q# rtcic_32koutdefaultwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclk&&txrxdefault   pdisabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclk&&txrxdefault   pdisabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclk&&txrxdefault   pdisabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclk&&txrxdefault   pdisabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclk&&default!. pdisabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclk&&default!.pokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclk&&default!. pdisabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclk&& default!. pdisabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclk& & default!. pdisabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclk& & default!. pdisabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclk&&default!. pdisabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclk&&default!. pdisabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclk&&default!. pdisabledthermal-zonescpu-thermaldtripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 0 " gpu-thermaltripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0  "tsadc@fe710000,rockchip,rk3568-tsadcq s2Bf@ `tsadcapb_pclkDn  1sdefaultsleep H Rpokay h saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclkD saradc-apb pokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault8 pdisabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault8 pdisabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault8 pdisabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault8 pdisabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault8 pdisabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault8 pdisabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault8 pdisabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault8 pdisabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault8 pdisabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault8 pdisabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault8 pdisabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault8 pdisabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe2"BD   pokayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe2%BD   pokayphy@fe870000,rockchip,rk3568-csi-dphyypclk Dapbn  pdisabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz % apbD pdisabledOmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ % apbD pdisabledPusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m  pokayhost-port pokay otg-port pokayusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m  pokayhost-port pokay otg-port pokaypinctrl,rockchip,rk3568-pinctrln X gpio@fdd60000,rockchip,gpio-bank !.     "k#gpio@fe740000,rockchip,gpio-bankt "cd    "kgpio@fe750000,rockchip,gpio-banku #ef  @  "kgpio@fe760000,rockchip,gpio-bankv $gh  `  "k[gpio@fe770000,rockchip,gpio-bankw %ij    "kpcfg-pull-up .pcfg-pull-none ;pcfg-pull-none-drv-level-1 ; Hpcfg-pull-none-drv-level-2 ; Hpcfg-pull-none-drv-level-3 ; Hpcfg-pull-up-drv-level-1 . Hpcfg-pull-up-drv-level-2 . Hpcfg-pull-none-smt ; Wacodecaudiopwmbt656bt1120camcan0can0m0-pins l  can1can1m0-pins lcan2can2m0-pins l  cifclk32kclk32k-out0 lcpuebcedpdpemmcemmc-bus8 l  bemmc-clk lcemmc-cmd ldeth0eth1flashfspifspi-pins` lagmac0gmac1gpuhdmitxhdmitxm0-cec lShdmitx-scl lQhdmitx-sda lRi2c0i2c0-xfer l  !i2c1i2c1-xfer l  }i2c2i2c2m0-xfer l ~i2c3i2c3m0-xfer li2c4i2c4m0-xfer l  i2c5i2c5m0-xfer l  i2s1i2s1m0-lrckrx lii2s1m0-lrcktx lhi2s1m0-sclkrx lgi2s1m0-sclktx lfi2s1m0-sdi0 l ji2s1m0-sdi1 l ki2s1m0-sdi2 l li2s1m0-sdi3 lmi2s1m0-sdo0 lni2s1m0-sdo1 loi2s1m0-sdo2 l pi2s1m0-sdo3 l qi2s2i2s2m0-lrcktx lsi2s2m0-sclktx lri2s2m0-sdi lti2s2m0-sdo lui2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk lvpdmm0-clk1 lwpdmm0-sdi0 l xpdmm0-sdi1 l ypdmm0-sdi2 l zpdmm0-sdi3 l{pmicpmic-int l$pmupwm0pwm0m0-pins l(pwm1pwm1m0-pins l)pwm2pwm2m0-pins l*pwm3pwm3-pins l+pwm4pwm4-pins lpwm5pwm5-pins lpwm6pwm6-pins lpwm7pwm7-pins lpwm8pwm8m0-pins l pwm9pwm9m0-pins l pwm10pwm10m0-pins l pwm11pwm11m0-pins lpwm12pwm12m0-pins lpwm13pwm13m0-pins lpwm14pwm14m0-pins lpwm15pwm15m0-pins lrefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ l]sdmmc0-clk l^sdmmc0-cmd l_sdmmc0-det l`sdmmc1sdmmc2spdifspdifm0-tx l|spi0spi0m0-pins0 l spi0m0-cs0 lspi0m0-cs1 lspi1spi1m0-pins0 l spi1m0-cs0 lspi1m0-cs1 lspi2spi2m0-pins0 lspi2m0-cs0 lspi2m0-cs1 lspi3spi3m0-pins0 l  spi3m0-cs0 lspi3m0-cs1 ltsadctsadc-shutorg ltsadc-pin luart0uart0-xfer l'uart1uart1m0-xfer l  uart2uart2m0-xfer luart3uart3m0-xfer luart4uart4m0-xfer luart5uart5m0-xfer luart6uart6m0-xfer luart7uart7m0-xfer luart8uart8m0-xfer luart9uart9m0-xfer lvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2hym8563hym8563-int lusbvcc5v0-usb-host-en lvcc5v0-usb-otg-en lgpio-ledslan-led-pin lpower-led-pin lwan-led-pin lwlan-led-pin lpciepcie20-reset-pin lZrockchip-keyreset-button-pin lsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ^  sata-phy% pdisabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon ?qos@fe190100,rockchip,rk3568-qossyscon @qos@fe190200,rockchip,rk3568-qossyscon Asyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy &'wrefclk_mrefclk_npclkDphy zpokay pcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<^syspmcmsglegacyerr` "  pcie-phy%0@@'T @@@YdbiapbconfigDpipepokay ,# legacy-interrupt-controllerk pcie@fe280000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<^syspmcmsglegacyerr`  "  pcie-phy%0@(T @@YdbiapbconfigDpipepokay ,# legacy-interrupt-controllerk ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*^macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refD stmmacethn  pdisabledmdio,snps,dwmac-mdio stmmac-axi-config rx-queues-config-queue0tx-queues-configCqueue0can@fe570000,rockchip,rk3568v2-canfdW A@ baudpclkDUT coreapbdefault pdisabledcan@fe580000,rockchip,rk3568v2-canfdX CB baudpclkDWV coreapbdefault pdisabledcan@fe590000,rockchip,rk3568v2-canfdY ED baudpclkDYX coreapbdefault pdisabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe2BD   pokaychosen serial2:1500000n8hdmi-con,hdmi-connectoraportendpointcWvdd-usbc-regulator,regulator-fixed vdd_usbcLK@LK@vcc3v3-sys-regulator,regulator-fixed vcc3v3_sys2Z2Z%vcc5v0-sys-regulator,regulator-fixed vcc5v0_sysLK@LK@"vcc3v3-pcie-regulator,regulator-fixed vcc3v3_pcie2Z2Z  2#  @"vcc5v0-usb-regulator,regulator-fixed vcc5v0_usbLK@LK@vcc5v0-usb-host-regulator,regulator-fixed  #defaultvcc5v0_usb_hostLK@LK@vcc5v0-usb-otg-regulator,regulator-fixed  #defaultvcc5v0_usb_otgLK@LK@pcie30-avdd0v9-regulator,regulator-fixedpcie30_avdd0v9  %pcie30-avdd1v8-regulator,regulator-fixedpcie30_avdd1v8w@w@%gpio-keys ,gpio-keysdefaultbutton-reset 2 2# reset gpio-leds ,gpio-ledsdefaultled-lan  lan 2[led-power  power heartbeat 2[led-wan  wan 2[led-wlan  wlan 2[ interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesreset-gpiosno-sdiono-mmcbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplynon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfdata-lanesvpcie3v3-supplystdout-pathenable-active-highstartup-delay-usgpiodebounce-intervallabellinux,codecolorfunctionlinux,default-trigger