*8( coolpi,pi-4brockchip,rk3588s +7RK3588S CoolPi 4 Model Baliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000/mmc@fe2d0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55psci"5 < L0,a q~@@  "cpu@100cpuarm,cortex-a55psci"5 a q~@@ "cpu@200cpuarm,cortex-a55psci"5 a q~@@ "cpu@300cpuarm,cortex-a55psci"5 a q~@@ "cpu@400cpuarm,cortex-a76psci"5 < L0,a q~@@"cpu@500cpuarm,cortex-a76psci"5 a q~@@"cpu@600cpuarm,cortex-a76psci"5 < L0,a q~@@"cpu@700cpuarm,cortex-a76psci"5 a q~@@" idle-states*pscicpu-sleeparm,idle-state7H_dpx" l2-cache-l0caches@" l2-cache-l1caches@"l2-cache-l2caches@"l2-cache-l3caches@"l2-cache-b0caches@"l2-cache-b1caches@"l2-cache-b2caches@"l2-cache-b3caches@"l3-cachecaches0@"display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14" protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    % sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram+sram@0arm,scmi-shmem"gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf < L 5!corecoregroupstacks 0\]^  jobmmugpu- ;okay!B""usb@fc000000rockchip,rk3588-dwc3snps,dwc3@5!ref_clksuspend_clkbus_clkNotg V#$[usb2-phyusb3-phy eutmi_wide- nRu ;disabledusb@fc800000"rockchip,rk3588-ehcigeneric-ehci5%V&[usb- ;okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci5%V&[usb- ;okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci5'V([usb- ;okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci5'V([usb- ;okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(5jihkr&!ref_clksuspend_clkbus_clkutmipipeNhostV) [usb3-phy eutmi_widen4u! ;disablediommu@fc900000 arm,smmu-v3 @qsvo eventqgerrorpriqcmdq-sync; ;disablediommu@fcb00000 arm,smmu-v3 @}{ eventqgerrorpriqcmdq-sync; ;disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX"nsyscon@fd58c000rockchip,rk3588-sys-grfsysconX"isyscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ "jsyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` 5"syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@5"ksyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@"syscon@fd5b0000rockchip,rk3588-php-grfsyscon["+syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon["syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@"syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@"syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+"usb2phy@0rockchip,rk3588-usb2phy5!phyclk usb480m_phy0nmHphyapb ;disabled"otg-portT ;disabled"#syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy5!phyclk usb480m_phy2noHphyapb;okay"%host-portT;okay_*"&syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy5!phyclk usb480m_phy3np Hphyapb;okay"'host-portT;okay"(syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^"syscon@fd5f0000rockchip,rk3588-iocsyscon_"sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|<]q@LA.2Fq)׫ׄe/ׄ eZ р j+"i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=5ts !i2cpclkw,default+;okayregulator@42rockchip,rk8602Bvdd_cpu_big0_s0dp&-"regulator-state-mem1regulator@43 rockchip,rk8603rockchip,rk8602Cvdd_cpu_big1_s0dp&-"regulator-state-mem1serial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK5!baudclkapb_pclkJ..Otxrxw/defaultYc ;disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5 !pwmpclkw0defaultp ;disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5 !pwmpclkw1defaultp ;disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5 !pwmpclkw2defaultp;okaypwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05 !pwmpclkw3defaultp ;disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd"lpower-controller!rockchip,rk3588-power-controller{+;okay" power-domain@8{+power-domain@9  5!#" 456{+power-domain@10 5!#"7{power-domain@11 5!#"8{power-domain@12 59:;<{power-domain@13 +{power-domain@14(5={power-domain@15 5>{power-domain@165 ?@A+{power-domain@17 5 BCD{power-domain@215 EFGHIJKL+{power-domain@235CAM{power-domain@14 5={power-domain@155>{power-domain@225N{power-domain@245[Z]OP+{power-domain@2585ZQ{power-domain@2685QRS{power-domain@2705TUVW+{power-domain@28 5XY{power-domain@29(5Z[{power-domain@305z{\{power-domain@31@5W]^_`{power-domain@33!5WZ[{power-domain@34"5WZ[{power-domain@37%52a{power-domain@38&545{power-domain@40(b{video-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpuw vdpu5 !aclkhclkc- iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu@v !aclkiface5- ;"crga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rgat5!aclkhclksclknrqp Hcoreaxiahb- video-codec@fdba0000rockchip,rk3588-vepu121z5 !aclkhclkd- iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu@y5 !aclkiface- ;"dvideo-codec@fdba4000rockchip,rk3588-vepu121@|5 !aclkhclke- iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommuH@{5 !aclkiface- ;"evideo-codec@fdba8000rockchip,rk3588-vepu121~5 !aclkhclkf- iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu@}5 !aclkiface- ;"fvideo-codec@fdbac000rockchip,rk3588-vepu1215 !aclkhclkg- iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu@5 !aclkiface- ;"gvideo-codec@fdc70000rockchip,rk3588-av1-vpul vdpu<ACLׄׄ5AC !aclkhclk-  nvop@fdd90000rockchip,rk3588-vop BPvopgamma-lut85]\abcd[7!aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_voph- jijkl ;disabledports+"port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~5]\ !aclkiface;-  ;disabled"hi2s@fddc0000rockchip,rk3588-i2s-tdm5!mclk_txmclk_rxhclk<JmOtx- nHtx-m ;disabledi2s@fddf0000rockchip,rk3588-i2s-tdm5445!mclk_txmclk_rxhclk<1JmOtx- nHtx-m ;disabledi2s@fddfc000rockchip,rk3588-i2s-tdm500,!mclk_txmclk_rxhclk<-JmOrx- nHrx-m ;disabledqos@fdf35000rockchip,rk3588-qossysconP "9qos@fdf35200rockchip,rk3588-qossysconR ":qos@fdf35400rockchip,rk3588-qossysconT ";qos@fdf35600rockchip,rk3588-qossysconV "<qos@fdf36000rockchip,rk3588-qossyscon` "\qos@fdf39000rockchip,rk3588-qossyscon "aqos@fdf3d800rockchip,rk3588-qossyscon "bqos@fdf3e000rockchip,rk3588-qossyscon "^qos@fdf3e200rockchip,rk3588-qossyscon "]qos@fdf3e400rockchip,rk3588-qossyscon "_qos@fdf3e600rockchip,rk3588-qossyscon "`qos@fdf40000rockchip,rk3588-qossyscon "Zqos@fdf40200rockchip,rk3588-qossyscon "[qos@fdf40400rockchip,rk3588-qossyscon "Tqos@fdf40500rockchip,rk3588-qossyscon "Uqos@fdf40600rockchip,rk3588-qossyscon "Vqos@fdf40800rockchip,rk3588-qossyscon "Wqos@fdf41000rockchip,rk3588-qossyscon "Xqos@fdf41100rockchip,rk3588-qossyscon "Yqos@fdf60000rockchip,rk3588-qossyscon "?qos@fdf60200rockchip,rk3588-qossyscon "@qos@fdf60400rockchip,rk3588-qossyscon "Aqos@fdf61000rockchip,rk3588-qossyscon "Bqos@fdf61200rockchip,rk3588-qossyscon "Cqos@fdf61400rockchip,rk3588-qossyscon "Dqos@fdf62000rockchip,rk3588-qossyscon "=qos@fdf63000rockchip,rk3588-qossyscon0 ">qos@fdf64000rockchip,rk3588-qossyscon@ "Mqos@fdf66000rockchip,rk3588-qossyscon` "Eqos@fdf66200rockchip,rk3588-qossysconb "Fqos@fdf66400rockchip,rk3588-qossyscond "Gqos@fdf66600rockchip,rk3588-qossysconf "Hqos@fdf66800rockchip,rk3588-qossysconh "Iqos@fdf66a00rockchip,rk3588-qossysconj "Jqos@fdf66c00rockchip,rk3588-qossysconl "Kqos@fdf66e00rockchip,rk3588-qossysconn "Lqos@fdf67000rockchip,rk3588-qossysconp "Nqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon "7qos@fdf71000rockchip,rk3588-qossyscon "8qos@fdf72000rockchip,rk3588-qossyscon "4qos@fdf72200rockchip,rk3588-qossyscon" "5qos@fdf72400rockchip,rk3588-qossyscon$ "6qos@fdf80000rockchip,rk3588-qossyscon "Qqos@fdf81000rockchip,rk3588-qossyscon "Rqos@fdf81200rockchip,rk3588-qossyscon "Sqos@fdf82000rockchip,rk3588-qossyscon "Oqos@fdf82200rockchip,rk3588-qossyscon" "Pdfi@fe060000rockchip,rk3588-dfi@&0:npcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?05CH>MR)!aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerr`,oooo:KZ0p0bV) [pcie-phy- "T @ @0 @@dbiapbconfign). Hpwrpipe+ ;disabledlegacy-interrupt-controllerl "opcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O05DI?NSs)!aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerr`,qqqq:KZ@p@bVr [pcie-phy- "T @ @0 A@dbiapbconfign*/ Hpwrpipe+;okaydefaultws tlegacy-interrupt-controllerl "qethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(567Y^50!stmmacethclk_mac_refpclk_macaclk_macptp_ref- !n$ Hstmmacethji+uvw ;disabledmdiosnps,dwmac-mdio+stmmac-axi-config"urx-queues-config"vqueue0queue1tx-queues-config."wqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(5b_eTo!satapmaliverxoobrefasicD+ ;disabledsata-port@0V@Vr [sata-phyc r sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(5dagVq!satapmaliverxoobrefasicD+ ;disabledsata-port@0V@V) [sata-phyc r spi@fe2b0000 rockchip,sfc+@5/0!clk_sfchclk_sfc+ ;disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ 5  !biuciuciu-driveciu-sampleрdefaultwxyz{- (;okay|}mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ 5!biuciuciu-driveciu-sampleрdefaultw~- %;okay+6<mmc@fe2e0000rockchip,rk3588-dwcmshc.<-., L n6 (5,*+-.!corebusaxiblocktimer wdefault(nHcorebusaxiblocktimer;okayJY6<i2s@fe470000rockchip,rk3588-i2s-tdmG5+/(!mclk_txmclk_rxhclk<)-J..Otxrx- &n*+ Htx-mrx-msdefaultw;okayport"endpointi2s"i2s@fe480000rockchip,rk3588-i2s-tdmH5y}u!mclk_txmclk_rxhclkJ..Otxrxn^_ Htx-mrx-msdefault(w ;disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI5!i2s_clki2s_hclk<JOtxrx- &defaultw ;disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ5%!i2s_clki2s_hclk<"JOtxrx- &defaultw ;disabledinterrupt-controller@fe600000 arm,gic-v3 `h la8+"msi-controller@fe640000arm,gic-v3-itsd"pmsi-controller@fe660000arm,gic-v3-itsfppi-partitionsinterrupt-partition-0"interrupt-partition-1 "dma-controller@fea10000arm,pl330arm,primecell@ VW5n !apb_pclk ".dma-controller@fea30000arm,pl330arm,primecell@ XY5o !apb_pclk "i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c5{ !i2cpclk>wdefault+ ;disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c5| !i2cpclk?wdefault+;okayregulator@42rockchip,rk8602B vdd_npu_s0dp~&-regulator-state-mem1i2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c5} !i2cpclk@wdefault+ ;disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c5~ !i2cpclkAwdefault+ ;disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkBwdefault+ ;disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !5TW !pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt5dc !tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF5!spiclkapb_pclkJ..Otxrx  wdefault+ ;disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG5!spiclkapb_pclkJ..Otxrx  wdefault+ ;disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH5!spiclkapb_pclkJOtxrx wdefault+;okay<L pmic@0rockchip,rk806   "defaultw .B@ @- L- X- d- p- |- - - - -  -   -dvs1-null-pins gpio_pwrctrl1 pin_fun0"dvs2-null-pins gpio_pwrctrl2 pin_fun0"dvs3-null-pins gpio_pwrctrl3 pin_fun0"regulatorsdcdc-reg1 vdd_gpu_s0dp~0 ""regulator-state-mem1dcdc-reg2vdd_cpu_lit_s0dp~0"regulator-state-mem1dcdc-reg3 vdd_log_s0 L q0regulator-state-mem1 # qdcdc-reg4 vdd_vdenc_s0dp~0regulator-state-mem1dcdc-reg5 vdd_ddr_s0 L 0regulator-state-mem1 # Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem ?dcdc-reg7vdd_2v0_pldo_s30"regulator-state-mem ? #dcdc-reg8 vcc_3v3_s32Z2Z"|regulator-state-mem ? #2Zdcdc-reg9 vddq_ddr_s0regulator-state-mem1dcdc-reg10 vcc_1v8_s3w@w@regulator-state-mem ? #w@pldo-reg1 avcc_1v8_s0w@w@"regulator-state-mem1pldo-reg2 vcc_1v8_s0w@w@"regulator-state-mem1 #w@pldo-reg3 avdd_1v2_s0OOregulator-state-mem1pldo-reg4 vcc_3v3_s02Z2Z0regulator-state-mem1pldo-reg5 vccio_sd_s0w@2Z0"}regulator-state-mem1pldo-reg6 pldo6_s3w@w@regulator-state-mem ? #w@nldo-reg1 vdd_0v75_s3 q qregulator-state-mem ? # qnldo-reg2vdd_ddr_pll_s0 P Pregulator-state-mem1 # Pnldo-reg3 avdd_0v75_s0 q qregulator-state-mem1nldo-reg4 vdd_0v85_s0 P P"regulator-state-mem1nldo-reg5 vdd_0v75_s0 q qregulator-state-mem1spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI5!spiclkapb_pclkJOtxrx  wdefault+ ;disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL5!baudclkapb_pclkJ.. OtxrxwdefaultcY ;disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM5!baudclkapb_pclkJ. . OtxrxwdefaultcY;okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN5!baudclkapb_pclkJ. . OtxrxwdefaultcY ;disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO5!baudclkapb_pclkJ OtxrxwdefaultcY ;disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP5!baudclkapb_pclkJ OtxrxwdefaultcY ;disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ5!baudclkapb_pclkJ OtxrxwdefaultcY ;disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR5!baudclkapb_pclkJmmOtxrxwdefaultcY ;disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS5!baudclkapb_pclkJm m OtxrxwdefaultcY ;disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT5!baudclkapb_pclkJm m OtxrxwdefaultcY;okaypwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK !pwmpclkwdefaultp ;disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK !pwmpclkwdefaultp ;disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5LK !pwmpclkwdefaultp ;disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05LK !pwmpclkwdefaultp ;disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON !pwmpclkwdefaultp ;disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON !pwmpclkwdefaultp ;disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5ON !pwmpclkwdefaultp ;disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05ON !pwmpclkwdefaultp ;disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ !pwmpclkwdefaultp ;disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ !pwmpclkwactivep;okaypwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5RQ !pwmpclkwdefaultp ;disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05RQ !pwmpclkwdefaultp ;disabledthermal-zonespackage-thermal W m {tripspackage-crit 8   criticalbigcore0-thermal Wd m {tripsbigcore0-alert L  passive"bigcore0-crit 8   criticalcooling-mapsmap0  bigcore2-thermal Wd m {tripsbigcore2-alert L  passive"bigcore2-crit 8   criticalcooling-mapsmap0   littlecore-thermal Wd m {tripslittlecore-alert L  passive"littlecore-crit 8   criticalcooling-mapsmap0 0 center-thermal W m {tripscenter-crit 8   criticalgpu-thermal Wd m {tripsgpu-alert L  passive"gpu-crit 8   criticalcooling-mapsmap0  npu-thermal W m {tripsnpu-crit 8   criticaltsadc@fec00000rockchip,rk3588-tsadc5!tsadcapb_pclk<LnVWHtsadc-apbtsadc   w  gpiootpout ;okay"adc@fec10000rockchip,rk3588-saradc 5!saradcapb_pclknU Hsaradc-apb;okay 1i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkCwdefault+;okayrtc@51haoyu,hym8563Q hym8563defaultw"i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkDwdefault+;okayaudio-codec@10everest,es8316<1L51!mclkportendpoint"i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkEwdefault+ ;disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ5!spiclkapb_pclkJm mOtxrx  wdefault+ ;disabledefuse@fecc0000rockchip,rk3588-otp 5!otpapb_pclkphyarbn Hotpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c =npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[5p !apb_pclk "mphy@fed60000rockchip,rk3588-hdptx-phy 5T!refapbT8n#cde!""Hphyapbinitcmnlaneroplllcpllj ;disabledphy@fed80000rockchip,rk3588-usbdp-phyT5lV!refclkimmortalpclkutmi(n   Hinitcmnlanepcs_apbpma_apb B U f | ;disabled"$phy@fee00000rockchip,rk3588-naneng-combphy5vW !refapbpipe<LTn<CHphyapb + ;okay"rphy@fee20000rockchip,rk3588-naneng-combphy5xW !refapbpipe<LTn>EHphyapb + ;okay")sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrlj+"gpio@fd8a0000rockchip,gpio-bank5qr  l ""gpio@fec20000rockchip,gpio-bank5st  l "gpio@fec30000rockchip,gpio-bank5uv  @ l "gpio@fec40000rockchip,gpio-bank5wx  ` l ""tgpio@fec50000rockchip,gpio-bank5yz  l "pcfg-pull-up "pcfg-pull-down "pcfg-pull-none "pcfg-pull-none-drv-level-2  "pcfg-pull-up-drv-level-1  "pcfg-pull-up-drv-level-2  "pcfg-pull-none-smt  "auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout "emmc-bus8 "emmc-clk "emmc-cmd "emmc-data-strobe "eth1fspigmac1gpuhdmii2c0i2c0m2-xfer ",i2c1i2c1m0-xfer  "i2c2i2c2m0-xfer   "i2c3i2c3m0-xfer   "i2c4i2c4m0-xfer   "i2c5i2c5m0-xfer   "i2c6i2c6m3-xfer   "i2c7i2c7m0-xfer   "i2c8i2c8m0-xfer   "i2s0i2s0-lrck "i2s0-mclk "i2s0-sclk "i2s0-sdi0 "i2s0-sdo0 "i2s1i2s1m0-lrck "i2s1m0-sclk "i2s1m0-sdi0 "i2s1m0-sdi1 "i2s1m0-sdi2 "i2s1m0-sdi3 "i2s1m0-sdo0  "i2s1m0-sdo1  "i2s1m0-sdo2  "i2s1m0-sdo3  "i2s2i2s2m1-lrck "i2s2m1-sclk  "i2s2m1-sdi  "i2s2m1-sdo  "i2s3i2s3-lrck "i2s3-sclk "i2s3-sdi "i2s3-sdo "jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp "pmupwm0pwm0m0-pins "0pwm1pwm1m0-pins "1pwm2pwm2m1-pins  "2pwm3pwm3m0-pins "3pwm4pwm4m0-pins  "pwm5pwm5m0-pins "pwm6pwm6m0-pins  "pwm7pwm7m0-pins  "pwm8pwm8m0-pins  "pwm9pwm9m0-pins  "pwm10pwm10m0-pins  "pwm11pwm11m0-pins  "pwm12pwm12m0-pins  "pwm13pwm13m2-pins  "pwm14pwm14m0-pins  "pwm15pwm15m0-pins  "refclksatasata0sata1sata2sdiosdiom1-pins` "~sdmmcsdmmc-bus4@ "{sdmmc-clk "xsdmmc-cmd "ysdmmc-det "zspdif0spdif1spi0spi0m0-pins0 "spi0m0-cs0 "spi0m0-cs1 "spi1spi1m1-pins0 "spi1m1-cs0 "spi1m1-cs1 "spi2spi2m2-pins0  "spi2m2-cs0 "spi3spi3m1-pins0  "spi3m1-cs0 "spi3m1-cs1 "spi4spi4m0-pins0 "spi4m0-cs0 "spi4m0-cs1 "tsadctsadc-shut "uart0uart0m1-xfer  "/uart1uart1m1-xfer   "uart2uart2m0-xfer  "uart3uart3m1-xfer   "uart4uart4m1-xfer   "uart5uart5m1-xfer   "uart6uart6m1-xfer   "uart7uart7m1-xfer   "uart8uart8m1-xfer   "uart9uart9m2-xfer   "uart9m2-ctsn  "vopbt656gpio-functsadc-gpio-func "hym8563hym8563-int "ledgpio-leds "rtl8111rtl8111-isolate "ssdio-pwrseqwifi-enable-h "usbvcc5v0-host-en  "vcc5v0-u3host-en "wireless-bluetoothbt-reset-pin bt-wake-pin bt-wake-host-irq wireless-wlanwifi-host-wake-irq wifi-poweren-pin "opp-table-cluster0operating-points-v2 " opp-1008000000 &< - L L~ ;@opp-1200000000 &G - 4 4~ ;@opp-1416000000 &Tfr - ~ ;@ Lopp-1608000000 &_" - P P~ ;@opp-1800000000 &kI -~~~ ;@opp-table-cluster1operating-points-v2 "opp-1200000000 &G - L LB@ ;@opp-1416000000 &Tfr -  B@ ;@opp-1608000000 &_" - B@ ;@opp-1800000000 &kI - P PB@ ;@opp-2016000000 &x) -HHB@ ;@opp-2208000000 &h -llB@ ;@opp-2400000000 &  -B@B@B@ ;@opp-table-cluster2operating-points-v2 "opp-1200000000 &G - L LB@ ;@opp-1416000000 &Tfr -  B@ ;@opp-1608000000 &_" - B@ ;@opp-1800000000 &kI - P PB@ ;@opp-2016000000 &x) -HHB@ ;@opp-2208000000 &h -llB@ ;@opp-2400000000 &  -B@B@B@ ;@opp-tableoperating-points-v2"!opp-300000000 & - L L Popp-400000000 &ׄ - L L Popp-500000000 &e - L L Popp-600000000 &#F - L L Popp-700000000 &)' - ` ` Popp-800000000 &/ - q q Popp-900000000 &5 - 5 5 Popp-1000000000 &; - P P Panalog-soundaudio-graph-card X ]rk3588-es8316. cMIC2Mic JackHeadphonesHPOLHeadphonesHPOR) kMicrophoneMic JackHeadphoneHeadphoneschosen sserial2:1500000n8leds gpio-ledsdefaultwled-green  status  heartbeatled-red  off wlan  phy0txsdio-pwrseqmmc-pwrseq-simple5 !ext_clockdefaultw  "vcc12v-dcin-regulatorregulator-fixed vcc12v_dcin"vcc5v0-sys-regulatorregulator-fixed vcc5v0_sysLK@LK@&"-vcc5v0-usbdcin-regulatorregulator-fixedvcc5v0_usbdcinLK@LK@&"vcc5v0-usb-regulatorregulator-fixed vcc5v0_usbLK@LK@&avdd0v85-pcie20-regulatorregulator-fixedavdd0v85_pcie20 P P&avdd1v8-pcie20-regulatorregulator-fixedavdd1v8_pcie20w@w@&vcc3v3-mipi-regulatorregulator-fixed  t vcc3v3_mipi&|vcc5v0-host-regulatorregulator-fixed  tdefaultw vcc5v0_hostLK@LK@&-"*vcc5v0-otg-regulatorregulator-fixed  tdefaultw vcc5v0_otgLK@LK@&-vcc-1v1-nldo-s3-regulatorregulator-fixedvcc_1v1_nldo_s3&-" compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerreset-gpiosrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-sdnon-removablemmc-hs400-1_8vmmc-hs400-enhanced-stroberockchip,trcm-sync-tx-onlydai-formatmclk-fsremote-endpointmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csgpio-controller#gpio-cellsspi-max-frequencyvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspenddaislabelroutingwidgetsstdout-pathcolorlinux,default-triggerdefault-statepost-power-on-delay-msenable-active-highgpio