8`( $( ,radxa,rock-3brockchip,rk35687Radxa ROCK 3Baliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/ethernet@fe010000/mmc@fe310000/mmc@fe2b0000/mmc@fe000000cpus cpu@0cpu,arm,cortex-a55 &psci4HU@gt@ cpu@100cpu,arm,cortex-a55 &psci4HU@gt@ cpu@200cpu,arm,cortex-a55 &psci4HU@gt@ cpu@300cpu,arm,cortex-a55 &psci4HU@gt@ l3-cache,cacheJW@iopp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0opp-1992000000v 000display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc!, protocol@14 2opp-table-1,operating-points-v2Gopp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-card?HDMIVi2sookaysimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0-smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m2xin32k ,fixed-clockxin32kdefault2sram@10f000 ,mmio-sram   sram@0,arm,scmi-shmem sata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci @satapmaliverxoob _ "sata-phy,> disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob ` "sata-phy,> disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3 @ ref_clksuspend_clkbus_clkLotg Tutmi_wide>]dokay "usb2-phyusb3-phy}usb@fd000000,rockchip,rk3568-dwc3snps,dwc3 @ ref_clksuspend_clkbus_clkLhost "usb2-phyusb3-phy Tutmi_wide>]dokayinterrupt-controller@fd400000 ,arm,gic-v3  @F  A(usb@fd800000 ,generic-ehci  "usbokayusb@fd840000 ,generic-ohci  "usbokayusb@fd880000 ,generic-ehci  "usb disabledusb@fd8c0000 ,generic-ohci  "usb disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd fio-domains&,rockchip,rk3568-pmu-io-voltage-domainokay"0>syscon@fdc50000  ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd  syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsyscon syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsyscon syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsyscon syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsyscon ʀclock-controller@fdd00000,rockchip,rk3568-pmucru 2Lclock-controller@fdd20000,rockchip,rk3568-cru xin24m2LY iG ~ i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c  .- i2cpclk!default okayregulator@1c ,tcs,tcs4525 vdd_cpu 5 0$9"regulator-state-memDpmic@20,rockchip,rk809 YH~2Hmclkrk809-clkout1rk809-clkout2#default$%]n&&&&&&&&&regulatorsDCDC_REG1 vdd_logic  p$qregulator-state-memDDCDC_REG2vdd_gpu  p$qHregulator-state-memDDCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu  p$qregulator-state-memDDCDC_REG5vcc_1v8w@ w@regulator-state-memDLDO_REG1vdda0v9_image  bregulator-state-memDLDO_REG2 vdda_0v9  regulator-state-memDLDO_REG3 vdda0v9_pmu  regulator-state-mem/ LDO_REG4 vccio_acodec2Z 2Zregulator-state-memDLDO_REG5 vccio_sdw@ 2Zregulator-state-memDLDO_REG6 vcc3v3_pmu2Z 2Zregulator-state-mem/2ZLDO_REG7 vcca_1v8w@ w@regulator-state-memDLDO_REG8 vcca1v8_pmuw@ w@regulator-state-mem/w@LDO_REG9vcca1v8_imagew@ w@cregulator-state-memDSWITCH_REG1vcc_3v3regulator-state-memDSWITCH_REG2 vcc3v3_sdmregulator-state-memDserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart  t ,baudclkapb_pclkK''(defaultP] disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)defaultg disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*defaultg disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk+defaultg disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 0 pwmpclk,defaultg disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfd power-controller!,rockchip,rk3568-power-controllerr power-domain@7 -rpower-domain@8  ./0rpower-domain@9  123rpower-domain@10 456789rpower-domain@11 :rpower-domain@13 ;rpower-domain@14  <=>rpower-domain@15  ?@ABCDEFrgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost @$()' jobmmugpugpubus4G>okayHvideo-codec@fdea0400,rockchip,rk3568-vpu  vdpu aclkhclkI> iommu@fdea0800,rockchip,rk3568-iommu @  aclkiface> Irga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga  Zaclkhclksclk]&$% coreaxiahb> video-codec@fdee0000,rockchip,rk3568-vepu  @ aclkhclkJ> iommu@fdee0800,rockchip,rk3568-iommu @ ? aclkiface> Jmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc @ d biuciuciu-driveciu-sampleр]reset disabled  K+default LMN9GOSethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a  macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref] stmmaceth `PpQRokayY~inputS rgmii-iddefaultTUVWXYmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22 N P ZSstmmac-axi-config $Prx-queues-config4Qqueue0tx-queues-configJRqueue0vop@fe040000  0@`vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2[>  okay,rockchip,rk3568-vopY~ports port@0  endpoint@2 j\dport@1  port@2  iommu@fe043e00,rockchip,rk3568-iommu  >?  aclkiface> okay[dsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi  Dpclk"dphy]> apb]  disabledports port@0 port@1 dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi  Epclk"dphy^> apb]  disabledports port@0 port@1 hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefdefault _`a> P ]okayzbcports port@0 endpointjd\port@1 endpointjeqos@fe128000,rockchip,rk3568-qossyscon  -qos@fe138080,rockchip,rk3568-qossyscon  <qos@fe138100,rockchip,rk3568-qossyscon  =qos@fe138180,rockchip,rk3568-qossyscon  >qos@fe148000,rockchip,rk3568-qossyscon  .qos@fe148080,rockchip,rk3568-qossyscon  /qos@fe148100,rockchip,rk3568-qossyscon  0qos@fe150000,rockchip,rk3568-qossyscon  :qos@fe158000,rockchip,rk3568-qossyscon  4qos@fe158100,rockchip,rk3568-qossyscon  5qos@fe158180,rockchip,rk3568-qossyscon  6qos@fe158200,rockchip,rk3568-qossyscon  7qos@fe158280,rockchip,rk3568-qossyscon  8qos@fe158300,rockchip,rk3568-qossyscon  9qos@fe180000,rockchip,rk3568-qossyscon  qos@fe190000,rockchip,rk3568-qossyscon  ?qos@fe190280,rockchip,rk3568-qossyscon  Cqos@fe190300,rockchip,rk3568-qossyscon  Dqos@fe190380,rockchip,rk3568-qossyscon  Eqos@fe190400,rockchip,rk3568-qossyscon  Fqos@fe198000,rockchip,rk3568-qossyscon  ;qos@fe1a8000,rockchip,rk3568-qossyscon  1qos@fe1a8080,rockchip,rk3568-qossyscon  2qos@fe1a8100,rockchip,rk3568-qossyscon  3dfi@fe230000,rockchip,rk3568-dfi #  fpcie@fe260000,rockchip,rk3568-pcie0 @&`dbiapbconfig<KJIHGsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci`gggg    "pcie-phy>T  @@]pipe okaydefaulth Z "Olegacy-interrupt-controller Hgmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc +@ b biuciuciu-driveciu-sampleр]resetokay 2defaultijklGmSmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc ,@ c biuciuciu-driveciu-sampleр]reset disabledspi@fe300000 ,rockchip,sfc 0@ exvclk_sfchclk_sfcndefaultokay flash@0,jedec,spi-nor  =2 O `mmc@fe310000,rockchip,rk3568-dwcmshc 1 Y{}i n6(|zy{}corebusaxiblocktimerokay q  +defaultopqrGSrng@fe388000,rockchip,rk3568-rng 8@po coreahb]mokayi2s@fe400000,rockchip,rk3568-i2s-tdm @ 4Y=AiFqFq?C9mclk_txmclk_rxhclkKs tx]PQ tx-mrx-m ]okay i2s@fe410000,rockchip,rk3568-i2s-tdm A 5YEIiFqFqGK:mclk_txmclk_rxhclkKss rxtx]RS tx-mrx-m defaulttuvw]okay i2s@fe420000,rockchip,rk3568-i2s-tdm B 6YMiFqOO;mclk_txmclk_rxhclkKss txrx]Ttx-m defaultxyz{] disabledi2s@fe430000,rockchip,rk3568-i2s-tdm C 7SW<mclk_txmclk_rxhclkKss txrx]UV tx-mrx-m ] disabledpdm@fe440000,rockchip,rk3568-pdm D LZYpdm_clkpdm_hclkKs  rx|}~default]Xpdm-m] disabledspdif@fe460000,rockchip,rk3568-spdif F f mclkhclk_\Ks txdefault] disableddma-controller@fe530000,arm,pl330arm,primecell S@    apb_pclk 'dma-controller@fe550000,arm,pl330arm,primecell U@   apb_pclk si2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2c Z /HG i2cpclkdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c [ 0JI i2cpclkdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c \ 1LK i2cpclkdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c ] 2NM i2cpclkdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c ^ 3PO i2cpclkdefault okayrtc@51,haoyu,hym8563 Q#2 rtcic_32koutdefaultwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt `  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spi a gRQspiclkapb_pclkK'' txrxdefault   disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spi b hTSspiclkapb_pclkK'' txrxdefault   disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spi c iVUspiclkapb_pclkK'' txrxdefault   disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spi d jXWspiclkapb_pclkK'' txrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uart e ubaudclkapb_pclkK''defaultP] disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uart f v# baudclkapb_pclkK''defaultP]okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uart g w'$baudclkapb_pclkK''defaultP] disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uart h x+(baudclkapb_pclkK'' defaultP] disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uart i y/,baudclkapb_pclkK' ' defaultP] disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uart j z30baudclkapb_pclkK' ' defaultP] disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uart k {74baudclkapb_pclkK''defaultP] disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uart l |;8baudclkapb_pclkK'' defaultP] disabled serial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uart m }?<baudclkapb_pclkK''defaultP] disabledthermal-zonescpu-thermal d  tripscpu_alert0 p )passivecpu_alert1 $ )passivecpu_crit s ) criticalcooling-mapsmap0 40 9 gpu-thermal   tripsgpu-threshold p )passivegpu-target $ )passivegpu-crit s ) criticalcooling-mapsmap0 4 9tsadc@fe710000,rockchip,rk3568-tsadc q sYif@ `tsadcapb_pclk]  Hsdefaultsleep _ iokay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradc r ]saradcapb_pclk] saradc-apb okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm nZY pwmpclkdefaultg disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm nZY pwmpclkdefaultg disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm n ZY pwmpclkdefaultg disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm n0ZY pwmpclkdefaultg disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm o]\ pwmpclkdefaultg disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm o]\ pwmpclkdefaultg disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm o ]\ pwmpclkdefaultg disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm o0]\ pwmpclkdefaultg disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwm p`_ pwmpclkdefaultg disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwm p`_ pwmpclkdefaultg disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwm p `_ pwmpclkdefaultg disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwm p0`_ pwmpclkdefaultg disabledphy@fe830000,rockchip,rk3568-naneng-combphy "} refapbpipeY"i]   okayphy@fe840000,rockchip,rk3568-naneng-combphy %~ refapbpipeY%i]   okayphy@fe870000,rockchip,rk3568-csi-dphy ypclk ]apb  disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy  refpclkz > apb] disabled]mipi-dphy@fe860000,rockchip,rk3568-dsi-dphy  refpclk{ > apb] disabled^usb2phy@fe8a0000,rockchip,rk3568-usb2phy phyclkclk_usbphy0_480m  2okayhost-port okayotg-port okayusb2phy@fe8b0000,rockchip,rk3568-usb2phy phyclkclk_usbphy1_480m  2okayhost-port  disabledotg-port okaypinctrl,rockchip,rk3568-pinctrl f  gpio@fdd60000,rockchip,gpio-bank  !.   "  .#gpio@fe740000,rockchip,gpio-bank t "cd  "  .gpio@fe750000,rockchip,gpio-bank u #ef  "@  .gpio@fe760000,rockchip,gpio-bank v $gh  "`  .Zgpio@fe770000,rockchip,gpio-bank w %ij  "  .pcfg-pull-up :pcfg-pull-none Gpcfg-pull-none-drv-level-1 G Tpcfg-pull-none-drv-level-2 G Tpcfg-pull-none-drv-level-3 G Tpcfg-pull-up-drv-level-1 : Tpcfg-pull-up-drv-level-2 : Tpcfg-pull-none-smt G cacodecaudiopwmbt656bt1120camcan0can0m0-pins x  can1can1m0-pins xcan2can2m0-pins x  cifclk32kclk32k-out0 xcpuebcedpdpemmcemmc-bus8 x  oemmc-clk xpemmc-cmd xqemmc-datastrobe xreth0eth1flashfspifspi-pins` xngmac0gmac0-miim xgmac0-clkinout xgmac0-rx-bus20 xgmac0-tx-bus20 x   gmac0-rgmii-clk xgmac0-rgmii-bus@ xgmac1gmac1m1-miim xTgmac1m1-clkinout xYgmac1m1-rx-bus20 x Vgmac1m1-tx-bus20 xUgmac1m1-rgmii-clk xWgmac1m1-rgmii-bus@ xXgpuhdmitxhdmitxm0-cec xahdmitx-scl x_hdmitx-sda x`i2c0i2c0-xfer x  !i2c1i2c1-xfer x  i2c2i2c2m0-xfer x i2c3i2c3m0-xfer xi2c4i2c4m0-xfer x  i2c5i2c5m0-xfer x  i2s1i2s1m0-lrcktx xui2s1m0-mclk x%i2s1m0-sclktx xti2s1m0-sdi0 x vi2s1m0-sdo0 xwi2s2i2s2m0-lrcktx xyi2s2m0-sclktx xxi2s2m0-sdi xzi2s2m0-sdo x{i2s3ispjtaglcdcmcunpupcie20pcie20m1-pins0 xhpcie30x1pcie30x2pcie30x2m1-pins0 xpdmpdmm0-clk x|pdmm0-clk1 x}pdmm0-sdi0 x ~pdmm0-sdi1 x pdmm0-sdi2 x pdmm0-sdi3 xpmicpmic-int-l x$pmupwm0pwm0m0-pins x)pwm1pwm1m0-pins x*pwm2pwm2m0-pins x+pwm3pwm3-pins x,pwm4pwm4-pins xpwm5pwm5-pins xpwm6pwm6-pins xpwm7pwm7-pins xpwm8pwm8m0-pins x pwm9pwm9m0-pins x pwm10pwm10m0-pins x pwm11pwm11m0-pins xpwm12pwm12m0-pins xpwm13pwm13m0-pins xpwm14pwm14m0-pins xpwm15pwm15m0-pins xrefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ xisdmmc0-clk xjsdmmc0-cmd xksdmmc0-det xlsdmmc1sdmmc2sdmmc2m0-bus4@ xLsdmmc2m0-clk xMsdmmc2m0-cmd xNspdifspdifm0-tx xspi0spi0m0-pins0 x spi0m0-cs0 xspi0m0-cs1 xspi1spi1m0-pins0 x spi1m0-cs0 xspi1m0-cs1 xspi2spi2m0-pins0 xspi2m0-cs0 xspi2m0-cs1 xspi3spi3m0-pins0 x  spi3m0-cs0 xspi3m0-cs1 xtsadctsadc-shutorg xtsadc-pin xuart0uart0-xfer x(uart1uart1m0-xfer x  uart2uart2m0-xfer xuart3uart3m0-xfer xuart4uart4m0-xfer xuart5uart5m0-xfer xuart6uart6m0-xfer xuart7uart7m0-xfer xuart8uart8m0-xfer xuart8m0-ctsn x uart8m0-rtsn x uart9uart9m0-xfer xvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2bluetoothbt-reg-on-h x bt-wake-host-h x host-wake-bt-h x ir-receiverpwm3-ir xledsled xpciepcie-pwren-h xrtcrtcic-int-l xusbusb-host-pwren-h xusb-otg-pwren-h xwifiwifi-reg-on-h xwifi-wake-host-h xsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob ^ "sata-phy,> disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsyscon qos@fe190080,rockchip,rk3568-qossyscon  @qos@fe190100,rockchip,rk3568-qossyscon  Aqos@fe190200,rockchip,rk3568-qossyscon  Bsyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsyscon ˀphy@fe8c0000,rockchip,rk3568-pcie3-phy  &'wrefclk_mrefclk_npclk]phy okaypcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr`    "pcie-phy>0 @@'T  @@@`dbiapbconfig]pipe disabledlegacy-interrupt-controller pcie@fe280000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr`     "pcie-phy>0 @(T  @@`dbiapbconfig]pipeokaydefault legacy-interrupt-controller ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a *macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref] stmmaceth `pokayY~input rgmii-iddefaultmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22 N P Zstmmac-axi-config $rx-queues-config4queue0tx-queues-configJqueue0can@fe570000,rockchip,rk3568v2-canfd W A@ baudpclk]UT coreapbdefault disabledcan@fe580000,rockchip,rk3568v2-canfd X CB baudpclk]WV coreapbdefault disabledcan@fe590000,rockchip,rk3568v2-canfd Y ED baudpclk]YX coreapbdefault disabledphy@fe820000,rockchip,rk3568-naneng-combphy | refapbpipeYi]   okaychosen serial2:1500000n8hdmi-con,hdmi-connectoraportendpointjeir-receiver,gpio-ir-receiver #defaultleds ,gpio-ledsdefaultled-0  on heartbeat # heartbeatregulator-3v3-vcc-pi6c-03,regulator-fixed  #defaultvcc3v3_pi6c_032Z 2Z '9"regulator-3v3-vcc-sys,regulator-fixed vcc3v3_sys2Z 2Z9"&regulator-3v3-vcc-sys2,regulator-fixed vcc3v3_sys22Z 2Z9"Oregulator-5v0-vcc-sys,regulator-fixed vcc5v0_sysLK@ LK@"regulator-5v0-vcc-usb-host,regulator-fixed  #defaultvcc5v0_usb_hostLK@ LK@9"regulator-5v0-vcc-usb-otg,regulator-fixed  #defaultvcc5v0_usb_otgLK@ LK@9"sdio-pwrseq,mmc-pwrseq-simple ext_clockdefault d LK@ ZKsound,simple-audio-cardVi2s ?Analog RK809osimple-audio-card,cpusimple-audio-card,codec interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspend#sound-dai-cellssystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencybus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104vmmc-supplyvqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modephy-supplyreset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesvpcie3v3-supplydisable-wpspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthcap-mmc-highspeedmmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfstdout-pathcolordefault-statefunctionlinux,default-triggerenable-active-highstartup-delay-uspost-power-on-delay-mspower-off-delay-us