^8W(;W\ ,LG Nexus 5X rev 1.02lg,bullheadqcom,msm8992=handsetJV  c daliasesq/soc@0/mmc@f9824900v/soc@0/mmc@f98a4900{/soc@0/serial@f991e000chosenserial0:115200n8clocksxo-board 2fixed-clock$ xo_boardsleep-clk 2fixed-clock sleep_clkcpus cpu@0cpu2arm,cortex-a53pscil2-cache2cachecpu@1cpu2arm,cortex-a53pscicpu@2cpu2arm,cortex-a53pscicpu@3cpu2arm,cortex-a53pscicpu@100cpu2arm,cortex-a57pscil2-cache2cachecpu@101cpu2arm,cortex-a57psci cpu-mapcluster0core0core1core2core3cluster1core0core1 firmwarescm2qcom,scm-msm8994qcom,scmmemory@80000000memorypmu2arm,cortex-a53-pmu remoteproc$2qcom,msm8994-rpm-procqcom,rpm-procsmd-edge  &4rpm-requests2qcom,rpm-msm8994qcom,smd-rpm Drpm_requestsclock-controller2qcom,rpmcc-msm8992qcom,rpmccCpower-controller2qcom,msm8994-rpmpdVj opp-table2operating-points-v2 opp1~opp2~opp3~opp4~opp5~opp6~regulators-02qcom,rpm-pm8994-regulators     6HZl{s1 s2s3   s4w@w@s5 p ps7B@B@l1B@B@l2l3OOl4((l6w@w@l8w@w@l9w@w@l10w@w@l11OOl12w@w@l13w@-pl14OOl15w@w@l16)2)2l17)2)2l18--l19w@w@l20-p-pl21w@w@l22/M`/M`l23**l24.0l25w@w@l26lll27l28B@B@l29**l30w@w@l31CCl32w@w@regulators-12qcom,rpm-pmi8994-regulators s1boost-bypassreserved-memory 3smem@6a00000 :memory@7000000:memory@ca00000 :memory@c64000002qcom,rmtfs-mem@:Amemory@c6700000p:memory@c7000000:memory@c9400000@:reserved@6c00000@:ramoops@1ff000002ramoopsP]iumemory@3400000@:reserved@5000000:smem 2qcom,smemsmp2p-lpass 2qcom,smp2p  4master-kernelmaster-kernelslave-kernel slave-kernelsmp2p-modem 2qcom,smp2p  4master-kernelmaster-kernelslave-kernel slave-kernelsoc@0 3 2simple-businterrupt-controller@f90000002qcom,msm-qgic2 mailbox@f900d000%2qcom,msm8994-apcs-kpss-globalsyscon   watchdog@f9017000$2qcom,apss-wdt-msm8994qcom,kpss-wdtp timer@f9020000 32arm,armv7-timer-memframe@f9021000+  frame@f9023000+  0 8disabledframe@f9024000+  @ 8disabledframe@f9025000+  P 8disabledframe@f9026000+  ` 8disabledframe@f9027000+ p 8disabledframe@f9028000+  8disabledusb@f92f88002qcom,msm8994-dwc3qcom,dwc3/ 3 rms?coreifacesleepmock_utmiKsr[$'p~usb@f9200000 2snps,dwc3   high-speed peripheralmmc@f9824900%2qcom,msm8994-sdhciqcom,sdhci-msm-v4I@hccore{hc_irqpwr_irqvh?ifacecorexodefaultsleep (8okay6mmc@f98a4900%2qcom,msm8994-sdhciqcom,sdhci-msm-v4I@hccore}hc_irqpwr_irqi?ifacecorexodefaultsleep   ! "#$ E%d 8disableddma-controller@f99040002qcom,bam-v1.7.0@ :?bam_clkNYaz(serial@f991e000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm l ?coreifaceH:defaultsleep &'8okayi2c@f99230002qcom,i2c-qup-v2.2.10 _;: ?coreiface( ( txrxdefaultsleep )*  8disabledspi@f99230002qcom,spi-qup-v2.2.10 _<: ?coreiface( ( txrxdefaultsleep +,  8disabledi2c@f99240002qcom,i2c-qup-v2.2.1@ `=: ?coreiface((txrxdefaultsleep -.  8disabledi2c@f99260002qcom,i2c-qup-v2.2.1` bA: ?coreiface((txrxdefaultsleep /0  8disabledi2c@f99270002qcom,i2c-qup-v2.2.1p cC: ?coreiface11txrxdefaultsleep 23  8disabledi2c@f99280002qcom,i2c-qup-v2.2.1 dE: ?coreiface((txrxdefaultsleep 45  8disableddma-controller@f99440002qcom,bam-v1.7.0@ M?bam_clkNYaz1serial@f995e000%2qcom,msm-uartdm-v1.4qcom,msm-uartdm r ?coreiface[M11txrxdefaultsleep 67 8disabledi2c@f99630002qcom,i2c-qup-v2.2.10 eNM ?coreiface1 1 txrxdefaultsleep 89  8disabledspi@f99660002qcom,spi-qup-v2.2.1` hUM ?coreiface11txrxdefaultsleep :;  8disabledi2c@f99670002qcom,i2c-qup-v2.2.1p iVM ?coreifacej11txrxdefaultsleep <=  8disabledclock-controller@fc4000002qcom,gcc-msm8992V@  ?xosleepsram@fc4280002qcom,rpm-msg-ramB@restart@fc4ab000 2qcom,psholdJspmi@fc4cf0002qcom,spmi-pmic-arbLLLcoreintrcnfg periph_irq Y pmic@02qcom,pm8994qcom,spmi-pmic rtc@60002qcom,pm8941-rtc`a rtcalarmapon@8002qcom,pm8916-ponpwrkey2qcom,pm8941-pwrkey= tresin2qcom,pm8941-resin=  8disabledtemp-alarm@24002qcom,spmi-temp-alarm$$>thermalEadc@31002qcom,spmi-vadc11 />channel@7ARvph_pwrchannel@8 Rdie_tempchannel@9  Rref_625mvchannel@a  Rref_1250mvchannel@echannel@fgpio@c000 2qcom,pm8994-gpioqcom,spmi-gpioXh?t?mpps@a0002qcom,pm8994-mppqcom,spmi-mppXth@@pmic@12qcom,pm8994qcom,spmi-pmic pwm2qcom,pm8994-lpg  8disabledregulators2qcom,pm8994-regulatorspmic@22qcom,pmi8994qcom,spmi-pmic gpio@c000!2qcom,pmi8994-gpioqcom,spmi-gpioXhA tAmpps@a0002qcom,pmi8994-mppqcom,spmi-mppXhBtBpmic@32qcom,pmi8994qcom,spmi-pmic pwm2qcom,pmi8994-lpg  8disabledregulators2qcom,pmi8994-regulatorswled@d8002qcom,pmi8994-wled  ovpshort Rbacklight 8disabledhwlock@fd484000(2qcom,msm8994-tcsr-mutexqcom,tcsr-mutexH@pinctrl@fd5100002qcom,msm8992-pinctrlQ@ Xh%t%blsp1-uart2-default-state gpio4gpio5 blsp_uart2&blsp1-uart2-sleep-state gpio4gpio5gpio'blsp2-uart2-default-stategpio45gpio46gpio47gpio48 blsp_uart86blsp2-uart2-sleep-stategpio45gpio46gpio47gpio48gpio7i2c1-default-state gpio2gpio3 blsp_i2c1)i2c1-sleep-state gpio2gpio3gpio*i2c2-default-state gpio6gpio7 blsp_i2c2-i2c2-sleep-state gpio6gpio7gpio.i2c4-default-stategpio19gpio20 blsp_i2c4/i2c4-sleep-stategpio19gpio20gpio0i2c5-default-stategpio23gpio24 blsp_i2c52i2c5-sleep-stategpio23gpio24gpio3i2c6-default-stategpio28gpio27 blsp_i2c64i2c6-sleep-stategpio28gpio27gpio5i2c7-default-stategpio44gpio43 blsp_i2c78i2c7-sleep-stategpio44gpio43gpio9blsp2-spi10-default-state:default-pinsgpio53gpio54gpio55 blsp_spi10 cs-pinsgpio67gpioblsp2-spi10-sleep-stategpio53gpio54gpio55gpio;i2c11-default-stategpio83gpio84 blsp_i2c11<i2c11-sleep-stategpio83gpio84gpio=blsp1-spi1-default-state+default-pinsgpio0gpio1gpio3 blsp_spi1 cs-pinsgpio8gpioblsp1-spi1-sleep-stategpio0gpio1gpio3gpio,clk-on-state sdc1_clkclk-off-state sdc1_clkcmd-on-state sdc1_cmdcmd-off-state sdc1_cmddata-on-state sdc1_datadata-off-state sdc1_datarclk-on-state sdc1_rclkrclk-off-state sdc1_rclksdc2-clk-on-state sdc2_clk sdc2-clk-off-state sdc2_clk"sdc2-cmd-on-state sdc2_cmd  sdc2-cmd-off-state sdc2_cmd#sdc2-data-on-state sdc2_data !sdc2-data-off-state sdc2_data$clock-controller@fd8c00002qcom,mmcc-msm8992RVY?xogpll0mmssnoc_ahboxili_gfx3d_clk_srcdsi0plldsi0pllbytedsi1plldsi1pllbytehdmipll0CC (KDDDDD [/0)<98p/Dsram@fdd000002qcom,msm8974-ocmem  ctrlmem 3 C"Dr ?coreiface gmu-sram@0timer2arm,armv8-timer0vph-pwr-regulator2regulator-fixedvph_pwr66thermal-zonespm8994-thermalEtripspm8994-alert0$s0Epassivepm8994-crit$H0 Ecritical interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typeqcom,msm-idqcom,pmic-idqcom,board-idmmc1mmc2serial0stdout-path#clock-cellsclock-frequencyclock-output-namesphandledevice_typeregenable-methodnext-level-cachecache-levelcache-unifiedcpuinterruptsmboxesqcom,smd-edgeqcom,remote-pidqcom,smd-channels#power-domain-cellsoperating-points-v2opp-levelvdd_l1-supplyvdd_l2_26_28-supplyvdd_l3_11-supplyvdd_l4_27_31-supplyvdd_l5_7-supplyvdd_l6_12_32-supplyvdd_l8_16_30-supplyvdd_l9_10_18_22-supplyvdd_l13_19_23_24-supplyvdd_l14_15-supplyvdd_l17_29-supplyvdd_l20_21-supplyvdd_l25-supplyvdd_lvs1_2-supplyregulator-min-microvoltregulator-max-microvoltregulator-allow-set-loadregulator-system-loadregulator-always-onregulator-boot-onvdd_s1-supplyvdd_bst_byp-supplyrangesno-mapqcom,client-idconsole-sizerecord-sizeftrace-sizepmsg-sizememory-regionqcom,rpm-msg-ramhwlocksqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cells#mbox-cellsclockstimeout-secframe-numberstatusclock-namesassigned-clocksassigned-clock-ratespower-domainsqcom,select-utmi-as-pipe-clksnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirkmaximum-speeddr_modereg-namesinterrupt-namespinctrl-namespinctrl-0pinctrl-1bus-widthnon-removablemmc-hs400-1_8vcd-gpios#dma-cellsqcom,eeqcom,controlled-remotelynum-channelsqcom,num-eesdmasdma-names#reset-cellsqcom,channelmode-bootloadermode-recoverydebouncebias-pull-uplinux,codeio-channelsio-channel-names#thermal-sensor-cells#io-channel-cellsqcom,pre-scalinglabelgpio-controllergpio-ranges#gpio-cells#pwm-cellsqcom,cabcqcom,external-pfet#hwlock-cellspinsfunctiondrive-strengthbias-disablebias-pull-downregulator-namepolling-delay-passivethermal-sensorstemperaturehysteresis