8( =ޠ %,lunzn,fastrhino-r68srockchip,rk35687Lunzn FastRhino R68Saliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/ethernet@fe010000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55 psci*>K@]jw@ cpu@100cpu,arm,cortex-a55 psci*>K@]jw@ cpu@200cpu,arm,cortex-a55 psci*>K@]jw@ cpu@300cpu,arm,cortex-a55 psci*>K@]jw@ l3-cache,cache@M@_opp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0opp-1992000000v 000display-subsystem,rockchip,display-subsystem disabledfirmwarescmi ,arm,scmi-smc) protocol@14/opp-table-1,operating-points-v2Dopp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-cardK disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk&defaultU disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk'defaultU disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk(defaultU disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk)defaultU disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller` power-domain@7t*`power-domain@8 t+,-`power-domain@9  t./0`power-domain@10 t123456`power-domain@11 t7`power-domain@13 t8`power-domain@14 t9:;`power-domain@15 t<=>?@ABC`gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' {jobmmugpugpubus *D4okayEvideo-codec@fdea0400,rockchip,rk3568-vpu {vdpu aclkhclkF4 iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface4 Frga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ZaclkhclksclkS&$% coreaxiahb4 video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclkG4 iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface4 Gmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleрSreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a {macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refS stmmacethHIJokayOt_sY@ output-K 8rgmii-iddefaultLMNOPmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22QdefaultAN Q cR Kstmmac-axi-configoyHrx-queues-configIqueue0tx-queues-configJqueue0vop@fe040000 0@vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2S4 okay,rockchip,rk3568-vopOtports port@0 port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface4 okaySdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DpclkdphyT4 apbS disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EpclkdphyU4 apbS disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefdefault VWX4 > disabledports port@0port@1qos@fe128000,rockchip,rk3568-qossyscon *qos@fe138080,rockchip,rk3568-qossyscon 9qos@fe138100,rockchip,rk3568-qossyscon :qos@fe138180,rockchip,rk3568-qossyscon ;qos@fe148000,rockchip,rk3568-qossyscon +qos@fe148080,rockchip,rk3568-qossyscon ,qos@fe148100,rockchip,rk3568-qossyscon -qos@fe150000,rockchip,rk3568-qossyscon 7qos@fe158000,rockchip,rk3568-qossyscon 1qos@fe158100,rockchip,rk3568-qossyscon 2qos@fe158180,rockchip,rk3568-qossyscon 3qos@fe158200,rockchip,rk3568-qossyscon 4qos@fe158280,rockchip,rk3568-qossyscon 5qos@fe158300,rockchip,rk3568-qossyscon 6qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon <qos@fe190280,rockchip,rk3568-qossyscon @qos@fe190300,rockchip,rk3568-qossyscon Aqos@fe190380,rockchip,rk3568-qossyscon Bqos@fe190400,rockchip,rk3568-qossyscon Cqos@fe198000,rockchip,rk3568-qossyscon 8qos@fe1a8000,rockchip,rk3568-qossyscon .qos@fe1a8080,rockchip,rk3568-qossyscon /qos@fe1a8100,rockchip,rk3568-qossyscon 0dfi@fe230000,rockchip,rk3568-dfi#  Ypcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHG{syspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci` ZZZZ)8GV^ pcie-phy4T @@Spipe  disabledlegacy-interrupt-controllerz HZmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleрSreset disabledmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleрSreset disabledspi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfc[default disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 O{}_ n6(|zy{}corebusaxiblocktimerokayh rdefault\]^_rng@fe388000,rockchip,rk3568-rng8@po coreahbSmokayi2s@fe400000,rockchip,rk3568-i2s-tdm@ 4O=A_FqFq?C9mclk_txmclk_rxhclk9`txSPQ tx-mrx-m disabled i2s@fe410000,rockchip,rk3568-i2s-tdmA 5OEI_FqFqGK:mclk_txmclk_rxhclk9``rxtxSRS tx-mrx-mdefault0abcdefghijkl disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB 6OM_FqOO;mclk_txmclk_rxhclk9``txrxSTtx-mdefaultmnop disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclk9``txrxSUV tx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclk9` rxqrstuvdefaultSXpdm-m disabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\9`txdefaultw disableddma-controller@fe530000,arm,pl330arm,primecellS@   apb_pclk$dma-controller@fe550000,arm,pl330arm,primecellU@  apb_pclk`i2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclkxdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclkydefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclkzdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclk{default  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclk|default  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclk9$$txrxdefault }~  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclk9$$txrxdefault   disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclk9$$txrxdefault   disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclk9$$txrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclk9$$default>K disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclk9$$default>Kokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclk9$$default>K disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclk9$$ default>K disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclk9$ $ default>K disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclk9$ $ default>K disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclk9$$default>K disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclk9$$default>K disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclk9$$default>K disabledthermal-zonescpu-thermaldtripscpu_alert0ppassivecpu_alert1$passivecpu_crits criticalcooling-mapsmap00 gpu-thermaltripsgpu-thresholdppassivegpu-target$passivegpu-crits criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq sO_f@ `tsadcapb_pclkS sdefaultsleep " ,okay B Ysaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclkS saradc-apb tokay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultU disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultU disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultU disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefaultU disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultU disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultU disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaultU disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefaultU disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultU disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultU disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefaultU disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefaultU disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipeO"_S   okayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipeO%_S    disabledphy@fe870000,rockchip,rk3568-csi-dphyypclk Sapb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz 4 apbS disabledTmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ 4 apbS disabledUusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m  /okayhost-port okay otg-port okay usb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m  / disabledhost-port  disabledotg-port  disabledpinctrl,rockchip,rk3568-pinctrlY gpio@fdd60000,rockchip,gpio-bank !.    z!gpio@fe740000,rockchip,gpio-bankt "cd   zRgpio@fe750000,rockchip,gpio-banku #ef  @  zgpio@fe760000,rockchip,gpio-bankv $gh  `  zgpio@fe770000,rockchip,gpio-bankw %ij   zpcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  "pcfg-pull-none-drv-level-2  "pcfg-pull-none-drv-level-3  "pcfg-pull-up-drv-level-1  "pcfg-pull-up-drv-level-2  "pcfg-pull-none-smt  1acodecaudiopwmbt656bt1120camcan0can0m0-pins F  can1can1m0-pins Fcan2can2m0-pins F  cifclk32kclk32k-out0 Fcpuebcedpdpemmcemmc-bus8 F  \emmc-clk F]emmc-cmd F^emmc-datastrobe F_eth0eth1flashfspifspi-pins` F[gmac0gmac0-miim Fgmac0-rx-bus20 Fgmac0-tx-bus20 F   gmac0-rgmii-clk Fgmac0-rgmii-bus@ Feth-phy0-reset-pin Fgmac1gmac1m1-miim FLgmac1m1-rx-bus20 F Ngmac1m1-tx-bus20 FMgmac1m1-rgmii-clk FOgmac1m1-rgmii-bus@ FPeth-phy1-reset-pin F Qgpuhdmitxhdmitxm0-cec FXhdmitx-scl FVhdmitx-sda FWi2c0i2c0-xfer F  i2c1i2c1-xfer F  xi2c2i2c2m0-xfer F yi2c3i2c3m0-xfer Fzi2c4i2c4m0-xfer F  {i2c5i2c5m0-xfer F  |i2s1i2s1m0-lrckrx Fdi2s1m0-lrcktx Fci2s1m0-sclkrx Fbi2s1m0-sclktx Fai2s1m0-sdi0 F ei2s1m0-sdi1 F fi2s1m0-sdi2 F gi2s1m0-sdi3 Fhi2s1m0-sdo0 Fii2s1m0-sdo1 Fji2s1m0-sdo2 F ki2s1m0-sdo3 F li2s2i2s2m0-lrcktx Fni2s2m0-sclktx Fmi2s2m0-sdi Foi2s2m0-sdo Fpi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk Fqpdmm0-clk1 Frpdmm0-sdi0 F spdmm0-sdi1 F tpdmm0-sdi2 F updmm0-sdi3 Fvpmicpmic-int F"pmupwm0pwm0m0-pins F&pwm1pwm1m0-pins F'pwm2pwm2m0-pins F(pwm3pwm3-pins F)pwm4pwm4-pins Fpwm5pwm5-pins Fpwm6pwm6-pins Fpwm7pwm7-pins Fpwm8pwm8m0-pins F pwm9pwm9m0-pins F pwm10pwm10m0-pins F pwm11pwm11m0-pins Fpwm12pwm12m0-pins Fpwm13pwm13m0-pins Fpwm14pwm14m0-pins Fpwm15pwm15m0-pins Frefclksatasata0sata1sata2scrsdmmc0sdmmc1sdmmc2spdifspdifm0-tx Fwspi0spi0m0-pins0 F spi0m0-cs0 F}spi0m0-cs1 F~spi1spi1m0-pins0 F spi1m0-cs0 Fspi1m0-cs1 Fspi2spi2m0-pins0 Fspi2m0-cs0 Fspi2m0-cs1 Fspi3spi3m0-pins0 F  spi3m0-cs0 Fspi3m0-cs1 Ftsadctsadc-shutorg Ftsadc-pin Fuart0uart0-xfer F%uart1uart1m0-xfer F  uart2uart2m0-xfer Fuart3uart3m0-xfer Fuart4uart4m0-xfer Fuart5uart5m0-xfer Fuart6uart6m0-xfer Fuart7uart7m0-xfer Fuart8uart8m0-xfer Fuart9uart9m0-xfer Fvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2gpio-ledsstatus-led-pin Frockchip-keyreset-button-pin Fusbvcc5v0-usb-otg-en Fsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ^ sata-phy"4 disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon =qos@fe190100,rockchip,rk3568-qossyscon >qos@fe190200,rockchip,rk3568-qossyscon ?syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy &'wrefclk_mrefclk_npclkSphy Tokay epcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<{syspmcmsglegacyerr` )8GV^ pcie-phy40@@'T @@@dbiapbconfigSpipeokay c! plegacy-interrupt-controllerz pcie@fe280000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<{syspmcmsglegacyerr` )8GV ^ pcie-phy40@(T @@dbiapbconfigSpipeokay c! plegacy-interrupt-controllerz ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*{macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refS stmmacethokayOt_sY@ output- 8rgmii-iddefaultmdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22defaultAN Q cRstmmac-axi-configoyrx-queues-configqueue0tx-queues-configqueue0can@fe570000,rockchip,rk3568v2-canfdW A@ baudpclkSUT coreapbdefault disabledcan@fe580000,rockchip,rk3568v2-canfdX CB baudpclkSWV coreapbdefault disabledcan@fe590000,rockchip,rk3568v2-canfdY ED baudpclkSYX coreapbdefault disabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipeO_S   okaychosen serial2:1500000n8gpio-keys ,gpio-keysdefaultbutton-reset 2 i! reset gpio-leds ,gpio-ledsdefaultled-status  status i! heartbeatvcc12v-dcin-regulator,regulator-fixed vcc12v_dcinvcc3v3-pcie-regulator,regulator-fixed vcc3v3_pcie2Z2Z/ vcc3v3-sys-regulator,regulator-fixed vcc3v3_sys2Z2Z/#vcc5v0-sys-regulator,regulator-fixed vcc5v0_sysLK@LK@/ vcc5v0-usb-otg-regulator,regulator-fixed  !defaultvcc5v0_usb_otgLK@LK@/ adc-keys ,adc-keys  buttons w@button-recovery Recovery h # interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0ethernet1mmc0device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsstatusarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fssound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supplyvccio3-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-names#sound-dai-cellsrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthnon-removabledma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfdata-lanesvpcie3v3-supplystdout-pathdebounce-intervallabellinux,codecolorfunctionlinux,default-triggerenable-active-highgpioio-channelsio-channel-nameskeyup-threshold-microvoltpress-threshold-microvolt