8(  &,wolfvision,rk3568-pf5rockchip,rk35687WolfVision PF5aliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe2a0000/mmc@fe310000/i2c@fdd40000/rtc@51/i2c@fdd40000/pmic@20cpus cpu@0cpu,arm,cortex-a55 psci*>K@]jw@ cpu@100cpu,arm,cortex-a55 psci*>K@]jw@ cpu@200cpu,arm,cortex-a55 psci*>K@]jw@ cpu@300cpu,arm,cortex-a55 psci*>K@]jw@ l3-cache,cache@M@_opp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0opp-1992000000v 000display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc" protocol@14(opp-table-1,operating-points-v2Fopp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-card5HDMILi2se disabledsimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0#smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m(xin32k ,fixed-clockxin32kdefault(sram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _ sata-phy"4 disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ` sata-phy"4 disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clk Bperipheral Jutmi_wide4SZokay usb2-phyusb3-physusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkBhost usb2-phyusb3-phy Jutmi_wide4SZ disabledinterrupt-controller@fd400000 ,arm,gic-v3 @F  A(usb@fd800000 ,generic-ehci usb disabledusb@fd840000 ,generic-ohci usb disabledusb@fd880000 ,generic-ehci usb disabledusb@fd8c0000 ,generic-ohci usb disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdXio-domains&,rockchip,rk3568-pmu-io-voltage-domainokay &4BP^lsyscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru(zclock-controller@fdd20000,rockchip,rk3568-cruxin24m(z G i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclk default okaypmic@20,rockchip,rk809 !(default"## ##!$-#9$E$Q$]regulatorsDCDC_REG1 k0v9_logicz pqregulator-state-memDCDC_REG2k0v9_gpuz pqGregulator-state-memDCDC_REG3 k1v1_ddr4zregulator-state-memDCDC_REG4k0v9_npuz pqregulator-state-memDCDC_REG5k1v8zw@w@regulator-state-memLDO_REG1 k0v9a_image  Tregulator-state-memLDO_REG2k0v9az  regulator-state-memLDO_REG3 k0v9a_pmuz  regulator-state-mem- LDO_REG4 k3v3_acodecz2Z2Zregulator-state-memLDO_REG5k3v3_sdz2Z2Zregulator-state-memLDO_REG6k3v3_pmuz2Z2Zregulator-state-mem-2ZLDO_REG7k1v8azw@w@regulator-state-memLDO_REG8 k1v8a_pmuzw@w@regulator-state-mem-w@LDO_REG9 k1v8a_imagew@w@Uregulator-state-memSWITCH_REG1k3v3_swz2Z2Zregulator-state-memregulator@42 ,ti,tps62869BregulatorsSWk0v9_cpuz 0I#regulator-state-memrtc@51 ,nxp,pcf85263Qdefault%T0serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclkl&&'defaultq~ disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(default disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk)default disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*default disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk+default disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller power-domain@7,power-domain@8 -./power-domain@9  012power-domain@10 345678power-domain@11 9power-domain@13 :power-domain@14 ;<=power-domain@15 >?@ABCDEgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpugpubus *F4okayGvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu aclkhclkH4 iommu@fdea0800,rockchip,rk3568-iommu@  aclkiface4 Hrga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ZaclkhclksclkS&$% coreaxiahb4 video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclkI4 iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface4 Immc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleрSreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refS stmmacethJ$K7LJ disabledmdio,snps,dwmac-mdio stmmac-axi-configS]mJrx-queues-config}Kqueue0tx-queues-configLqueue0vop@fe040000 0@vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2M4 okay,rockchip,rk3568-vopports port@0 endpoint@2NVport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface4 okayMdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DpclkdphyO4 apbS disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EpclkdphyP4 apbS disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefdefault QRS4 qokayTUports port@0endpointVNport@1endpointWqos@fe128000,rockchip,rk3568-qossyscon ,qos@fe138080,rockchip,rk3568-qossyscon ;qos@fe138100,rockchip,rk3568-qossyscon <qos@fe138180,rockchip,rk3568-qossyscon =qos@fe148000,rockchip,rk3568-qossyscon -qos@fe148080,rockchip,rk3568-qossyscon .qos@fe148100,rockchip,rk3568-qossyscon /qos@fe150000,rockchip,rk3568-qossyscon 9qos@fe158000,rockchip,rk3568-qossyscon 3qos@fe158100,rockchip,rk3568-qossyscon 4qos@fe158180,rockchip,rk3568-qossyscon 5qos@fe158200,rockchip,rk3568-qossyscon 6qos@fe158280,rockchip,rk3568-qossyscon 7qos@fe158300,rockchip,rk3568-qossyscon 8qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon >qos@fe190280,rockchip,rk3568-qossyscon Bqos@fe190300,rockchip,rk3568-qossyscon Cqos@fe190380,rockchip,rk3568-qossyscon Dqos@fe190400,rockchip,rk3568-qossyscon Eqos@fe198000,rockchip,rk3568-qossyscon :qos@fe1a8000,rockchip,rk3568-qossyscon 0qos@fe1a8080,rockchip,rk3568-qossyscon 1qos@fe1a8100,rockchip,rk3568-qossyscon 2dfi@fe230000,rockchip,rk3568-dfi#  Xpcie@fe260000,rockchip,rk3568-pcie0@&dbiapbconfig<KJIHGsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci `YYYY,=L[jr pcie-phy4T @@Spipe  disabledlegacy-interrupt-controller HYmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleрSreset disabledmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleрSreset disabledspi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfcZdefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 {} n6(|zy{}corebusaxiblocktimerokay| default[\]^rng@fe388000,rockchip,rk3568-rng8@po coreahbSmokayi2s@fe400000,rockchip,rk3568-i2s-tdm@ 4=AFqFq?C9mclk_txmclk_rxhclkl_txSPQ tx-mrx-m disabled i2s@fe410000,rockchip,rk3568-i2s-tdmA 5EIFqFqGK:mclk_txmclk_rxhclkl__rxtxSRS tx-mrx-mdefault0`abcdefghijk disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB 6MFqOO;mclk_txmclk_rxhclkl__txrxSTtx-mdefaultlmno disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclkl__txrxSUV tx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclkl_ rxpqdefaultSXpdm-mokayspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\l_txdefaultr disableddma-controller@fe530000,arm,pl330arm,primecellS@   apb_pclk&dma-controller@fe550000,arm,pl330arm,primecellU@  apb_pclk_i2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclksdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclktdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclkudefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclkvdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclkwdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclkl&&txrxdefault xyz  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclkl&&txrxdefault {|}  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclkl&&txrxdefault ~  disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclkl&&txrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclkl&&defaultq~ disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclkl&&defaultq~okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclkl&&defaultq~ disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclkl&& defaultq~ disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclkl& & defaultq~ disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclkl& & defaultq~ disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclkl&&defaultq~ disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclkl&&defaultq~ disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclkl&&defaultq~ disabledthermal-zonescpu-thermaldtripscpu_alert0 p passivecpu_alert1 $ passivecpu_crit s  criticalcooling-mapsmap0 $0 ) gpu-thermaltripsgpu-threshold p passivegpu-target $ passivegpu-crit s  criticalcooling-mapsmap0 $ )tsadc@fe710000,rockchip,rk3568-tsadcq sf@ `tsadcapb_pclkS 8sdefaultsleep O Yokay o saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclkS saradc-apb okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe"S    disabledphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe%S    disabledphy@fe870000,rockchip,rk3568-csi-dphyypclk Sapb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz 4 apbS disabledOmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ 4 apbS disabledPusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m  (okayhost-port  disabledotg-port okayusb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m  ( disabledhost-port  disabledotg-port  disabledpinctrl,rockchip,rk3568-pinctrlX gpio@fdd60000,rockchip,gpio-bank !.     !gpio@fe740000,rockchip,gpio-bankt "cd    gpio@fe750000,rockchip,gpio-banku #ef  @  gpio@fe760000,rockchip,gpio-bankv $gh  `  gpio@fe770000,rockchip,gpio-bankw %ij    pcfg-pull-up *pcfg-pull-none 7pcfg-pull-none-drv-level-1 7 Dpcfg-pull-none-drv-level-2 7 Dpcfg-pull-none-drv-level-3 7 Dpcfg-pull-up-drv-level-1 * Dpcfg-pull-up-drv-level-2 * Dpcfg-pull-none-smt 7 Sacodecaudiopwmbt656bt1120camvcc12v-cam-en-pinctrl hvcc3v8-cam-en-pinctrl hcan0can0m0-pins h  can1can1m0-pins hcan2can2m0-pins h  cifclk32kclk32k-in h%clk32k-out0 hcpuebcedpdpemmcemmc-bus8 h  [emmc-clk h\emmc-cmd h]emmc-datastrobe h^eth0eth1flashfspifspi-pins` hZgmac0gmac1gpuhdmitxhdmitxm0-cec hShdmitx-scl hQhdmitx-sda hRhdmi-tx-5v-en-pinctrl hi2c0i2c0-xfer h   i2c1i2c1-xfer h  si2c2i2c2m0-xfer h ti2c3i2c3m0-xfer hui2c4i2c4m1-xfer h  vi2c5i2c5m0-xfer h  wi2s1i2s1m0-lrckrx hci2s1m0-lrcktx hbi2s1m0-sclkrx hai2s1m0-sclktx h`i2s1m0-sdi0 h di2s1m0-sdi1 h ei2s1m0-sdi2 h fi2s1m0-sdi3 hgi2s1m0-sdo0 hhi2s1m0-sdo1 hii2s1m0-sdo2 h ji2s1m0-sdo3 h ki2s2i2s2m0-lrcktx hmi2s2m0-sclktx hli2s2m0-sdi hni2s2m0-sdo hoi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk hppdmm0-sdi0 h qpmicpmic-int-l-pinctrl h"pmupwm0pwm0m0-pins h(pwm1pwm1m0-pins h)pwm2pwm2m0-pins h*pwm3pwm3-pins h+pwm4pwm4-pins hpwm5pwm5-pins hpwm6pwm6-pins hpwm7pwm7-pins hpwm8pwm8m0-pins h pwm9pwm9m0-pins h pwm10pwm10m0-pins h pwm11pwm11m0-pins hpwm12pwm12m0-pins hpwm13pwm13m0-pins hpwm14pwm14m0-pins hpwm15pwm15m0-pins hrefclksatasata0sata1sata2scrsdmmc0sdmmc1sdmmc2spdifspdifm0-tx hrspi0spi0m0-pins0 h zspi0m0-cs0 hxspi0m0-cs1 hyspi1spi1m0-pins0 h }spi1m0-cs0 h{spi1m0-cs1 h|spi2spi2m0-pins0 hspi2m0-cs0 h~spi2m0-cs1 hspi3spi3m0-pins0 h  spi3m0-cs0 hspi3m0-cs1 htsadctsadc-shutorg htsadc-pin huart0uart0-xfer h'uart1uart1m0-xfer h  uart2uart2m0-xfer huart3uart3m0-xfer huart4uart4m0-xfer huart5uart5m0-xfer huart6uart6m0-xfer huart7uart7m0-xfer huart8uart8m0-xfer huart9uart9m0-xfer hvopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ^ sata-phy"4 disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon ?qos@fe190100,rockchip,rk3568-qossyscon @qos@fe190200,rockchip,rk3568-qossyscon Asyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy &'wrefclk_mrefclk_npclkSphy v disabledpcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr `,=L[jr pcie-phy40@@'T @@@dbiapbconfigSpipe disabledlegacy-interrupt-controller pcie@fe280000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<syspmcmsglegacyerr `,=L[j r pcie-phy40@(T @@dbiapbconfigSpipe disabledlegacy-interrupt-controller ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refS stmmaceth$7J disabledmdio,snps,dwmac-mdio stmmac-axi-configS]mrx-queues-config}queue0tx-queues-configqueue0can@fe570000,rockchip,rk3568v2-canfdW A@ baudpclkSUT coreapbdefault disabledcan@fe580000,rockchip,rk3568v2-canfdX CB baudpclkSWV coreapbdefault disabledcan@fe590000,rockchip,rk3568v2-canfdY ED baudpclkSYX coreapbdefault disabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipeS   okaychosen serial2:115200n8hdmi-tx-connector,hdmi-connector aportendpointWhdmi-tx-5v-regulator,regulator-fixed  default khdmi_tx_5vLK@LK@I#pdm-codec ,dmic-codec pdm-sound,simple-audio-card 5microphonesimple-audio-card,cpusimple-audio-card,codecvcc12v-cam-regulator,regulator-fixed  defaultk12v_camIvcc12v-in-regulator,regulator-fixedk12v_inzvcc3v8-cam-regulator,regulator-fixed  !defaultk3v8_cam99I#vcc3v3-sys-regulator,regulator-fixedk3v3_sysz2Z2ZI#$vcc5v-in-regulator,regulator-fixedk5v_inzLK@LK@I# interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0rtc0rtc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirktx-fifo-resizeinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grfrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-nameregulator-always-onregulator-boot-onregulator-initial-moderegulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltvin-supplyquartz-load-femtofaradsdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthnon-removablevmmc-supplyvqmmc-supplydma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfstdout-pathhdmi-pwr-supplyenable-active-highgpionum-channels