t8(۴  ,anbernic,rg353vrockchip,rk35667handsetDAnbernic RG353ValiasesJ/pinctrl/gpio@fdd60000P/pinctrl/gpio@fe740000V/pinctrl/gpio@fe750000\/pinctrl/gpio@fe760000b/pinctrl/gpio@fe770000h/i2c@fdd40000m/i2c@fe5a0000r/i2c@fe5b0000w/i2c@fe5c0000|/i2c@fe5d0000/i2c@fe5e0000/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe310000/mmc@fe2b0000/mmc@fe2c0000/mmc@fe000000cpus cpu@0cpu,arm,cortex-a55 $psci2FS@er@ cpu@100cpu,arm,cortex-a55 $psci2FS@er@ cpu@200cpu,arm,cortex-a55 $psci2FS@er@ cpu@300cpu,arm,cortex-a55 $psci2FS@er@ l3-cache,cacheHU@gopp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0 opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc* protocol@14 0opp-table-1,operating-points-v2Dopp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-card=HDMITi2smokaysimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0+smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m0xin32k ,fixed-clockxin32kdefault0sram@10f000 ,mmio-sram  sram@0,arm,scmi-shmem sata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci @satapmaliverxoob _  sata-phy*< disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci satapmaliverxoob `  sata-phy*< disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3 @ ref_clksuspend_clkbus_clk Jperipheral Rutmi_wide<[bokay  usb2-phy{ high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3 @ ref_clksuspend_clkbus_clkJhost  usb2-phyusb3-phy Rutmi_wide<[bokayinterrupt-controller@fd400000 ,arm,gic-v3  @F  A(usb@fd800000 ,generic-ehci   usb disabledusb@fd840000 ,generic-ohci   usb disabledusb@fd880000 ,generic-ehci   usbokayusb@fd8c0000 ,generic-ohci   usbokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfd aio-domains&,rockchip,rk3568-pmu-io-voltage-domainokay .<syscon@fdc50000  ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfd syscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsyscon syscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsyscon syscon@fdca0000#,rockchip,rk3568-usb2phy-grfsyscon syscon@fdca8000#,rockchip,rk3568-usb2phy-grfsyscon ʀclock-controller@fdd00000,rockchip,rk3568-pmucru 0Jclock-controller@fdd20000,rockchip,rk3568-cru xin24m0J WgG d`|i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c  .- i2cpclk default okaypmic@20,rockchip,rk817 !rk808-clkout1rk808-clkout2mclkHWH|0default"#$$$$$$$$%regulatorsDCDC_REG1+?Q ipq vdd_logicregulator-state-mem DCDC_REG2+?Q ipqvdd_gpuEregulator-state-memDCDC_REG3+?vcc_ddrregulator-state-memDCDC_REG4+?Q2Zi2Zvcc_3v3regulator-state-mem2ZLDO_REG1+?Qw@iw@ vcca1v8_pmuMregulator-state-memw@LDO_REG2+?Q i  vdda_0v9regulator-state-memLDO_REG3+?Q i  vdda0v9_pmuregulator-state-mem LDO_REG4+?Q2Zi2Z vccio_acodecregulator-state-memLDO_REG5+?Qw@i2Z vccio_sdregulator-state-memLDO_REG6+?Q2Zi2Z vcc3v3_pmuregulator-state-mem2ZLDO_REG7+?Qw@iw@vcc_1v8regulator-state-memLDO_REG8+?Qw@i2Z vcc1v8_dvpregulator-state-memLDO_REG9+?Q*i* vcc2v8_dvpregulator-state-memBOOST+?QG`iReboost%regulator-state-memOTG_SWITCH otg_switchregulator-state-memcharger &'>dregulator@40 ,fcs,fan53555 @+?Q 4i5vdd_cpu$regulator-state-mempower-monitor@62,cellwise,cw2015 b disabledserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart  t ,baudclkapb_pclk''(default disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)defaultokaypwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk*default disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk+default disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 0 pwmpclk,default disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfd power-controller!,rockchip,rk3568-power-controller power-domain@7 -power-domain@8  ./0power-domain@9  123power-domain@10 456789power-domain@11 :power-domain@13 ;power-domain@14  <=>power-domain@15 ?@ABCgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost @$()' jobmmugpugpubus2D<okayEvideo-codec@fdea0400,rockchip,rk3568-vpu  vdpu aclkhclkF< iommu@fdea0800,rockchip,rk3568-iommu @  aclkiface< Frga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga  Zaclkhclksclk[&$% %coreaxiahb< video-codec@fdee0000,rockchip,rk3568-vepu  @ aclkhclkG< iommu@fdee0800,rockchip,rk3568-iommu @ ? aclkiface< Gmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc @ d biuciuciu-driveciu-sample1<р[%resetokayJTerH IJKdefaultLMethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a  macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref[ %stmmacethNOP disabledmdio,snps,dwmac-mdio stmmac-axi-config$.>Nrx-queues-configNOqueue0tx-queues-configdPqueue0vop@fe040000  0@zvopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2Q< okay,rockchip,rk3566-vopW|ports port@0  endpoint@2 R_port@1  endpoint@4 SUport@2  iommu@fe043e00,rockchip,rk3568-iommu  >?  aclkiface< okayQdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi  Dpclk dphyT< %apb[okay ports port@0 endpointUSport@1 endpointV[panel@0(,anbernic,rg353p-panelnewvision,nv3051d WdefaultX YZportendpoint[Vdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi  Epclk dphy\< %apb[ disabledports port@0 port@1 hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefdefault]< okay^ports port@0 endpoint_Rport@1 endpoint`qos@fe128000,rockchip,rk3568-qossyscon  -qos@fe138080,rockchip,rk3568-qossyscon  <qos@fe138100,rockchip,rk3568-qossyscon  =qos@fe138180,rockchip,rk3568-qossyscon  >qos@fe148000,rockchip,rk3568-qossyscon  .qos@fe148080,rockchip,rk3568-qossyscon  /qos@fe148100,rockchip,rk3568-qossyscon  0qos@fe150000,rockchip,rk3568-qossyscon  :qos@fe158000,rockchip,rk3568-qossyscon  4qos@fe158100,rockchip,rk3568-qossyscon  5qos@fe158180,rockchip,rk3568-qossyscon  6qos@fe158200,rockchip,rk3568-qossyscon  7qos@fe158280,rockchip,rk3568-qossyscon  8qos@fe158300,rockchip,rk3568-qossyscon  9qos@fe180000,rockchip,rk3568-qossyscon  qos@fe190000,rockchip,rk3568-qossyscon  ?qos@fe190280,rockchip,rk3568-qossyscon  @qos@fe190300,rockchip,rk3568-qossyscon  Aqos@fe190380,rockchip,rk3568-qossyscon  Bqos@fe190400,rockchip,rk3568-qossyscon  Cqos@fe198000,rockchip,rk3568-qossyscon  ;qos@fe1a8000,rockchip,rk3568-qossyscon  1qos@fe1a8080,rockchip,rk3568-qossyscon  2qos@fe1a8100,rockchip,rk3568-qossyscon  3dfi@fe230000,rockchip,rk3568-dfi #  apcie@fe260000,rockchip,rk3568-pcie0 @&zdbiapbconfig<KJIHGsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci`bbbb   ( 7 ?  pcie-phy<T @@[%pipe  disabledlegacy-interrupt-controller Hbmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc +@ b biuciuciu-driveciu-sample1<р[%resetokayJT I! Rcdefdefault ]mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc ,@ c biuciuciu-driveciu-sample1<р[%resetokayJT Ig  Rhijkdefault ]spi@fe300000 ,rockchip,sfc 0@ exvclk_sfchclk_sfcldefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc 1 W{}g n6(|zy{}corebusaxiblocktimerokaymnopqdefaultJ krng@fe388000,rockchip,rk3568-rng 8@po coreahb[m disabledi2s@fe400000,rockchip,rk3568-i2s-tdm @ 4W=AgFqFq?C9mclk_txmclk_rxhclkr ztx[PQ %tx-mrx-mokay i2s@fe410000,rockchip,rk3568-i2s-tdm A 5WEIgFqFqGK:mclk_txmclk_rxhclkrr zrxtx[RS %tx-mrx-mdefaultstuvokay i2s@fe420000,rockchip,rk3568-i2s-tdm B 6WMgFqOO;mclk_txmclk_rxhclkrr ztxrx[T%tx-mdefaultwxyz disabledi2s@fe430000,rockchip,rk3568-i2s-tdm C 7SW<mclk_txmclk_rxhclkrr ztxrx[UV %tx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdm D LZYpdm_clkpdm_hclkr  zrx{|}~default[X%pdm-m disabledspdif@fe460000,rockchip,rk3568-spdif F f mclkhclk_\r ztxdefault disableddma-controller@fe530000,arm,pl330arm,primecell S@    apb_pclk 'dma-controller@fe550000,arm,pl330arm,primecell U@   apb_pclk ri2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2c Z /HG i2cpclkdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c [ 0JI i2cpclkdefault okaytouch@1a,hynitron,cst340 Y default Y  i2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c \ 1LK i2cpclkdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c ] 2NM i2cpclkdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c ^ 3PO i2cpclkdefault okay^watchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt `  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spi a gRQspiclkapb_pclk'' ztxrxdefault   disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spi b hTSspiclkapb_pclk'' ztxrxdefault   disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spi c iVUspiclkapb_pclk'' ztxrxdefault   disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spi d jXWspiclkapb_pclk'' ztxrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uart e ubaudclkapb_pclk'' defaultokay bluetooth*,realtek,rtl8821cs-btrealtek,rtl8723bs-bt Y Y Yserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uart f v# baudclkapb_pclk''defaultokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uart g w'$baudclkapb_pclk''default disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uart h x+(baudclkapb_pclk'' default disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uart i y/,baudclkapb_pclk' ' default disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uart j z30baudclkapb_pclk' ' default disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uart k {74baudclkapb_pclk''default disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uart l |;8baudclkapb_pclk''default disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uart m }?<baudclkapb_pclk''default disabledthermal-zonescpu-thermal &d < Jtripscpu_alert0 Zp f?passivecpu_alert1 Z$ f?passivecpu_crit Zs f ?criticalcooling-mapsmap0 q0 v gpu-thermal & < Jtripsgpu-threshold Zp f?passivegpu-target Z$ f?passivegpu-crit Zs f ?criticalcooling-mapsmap0 q vtsadc@fe710000,rockchip,rk3568-tsadc q sWgf@ `tsadcapb_pclk[ sdefaultsleep  okay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradc r ]saradcapb_pclk[ %saradc-apb okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm nZY pwmpclkdefaultokaypwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm nZY pwmpclkdefaultokaypwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm n ZY pwmpclkdefaultokaypwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm n0ZY pwmpclkdefaultokaypwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwm o]\ pwmpclkdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwm o]\ pwmpclkdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwm o ]\ pwmpclkdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwm o0]\ pwmpclkdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwm p`_ pwmpclkdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwm p`_ pwmpclkdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwm p `_ pwmpclkdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwm p0`_ pwmpclkdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy "} refapbpipeW"g[   4okayphy@fe840000,rockchip,rk3568-naneng-combphy %~ refapbpipeW%g[   4 disabledphy@fe870000,rockchip,rk3568-csi-dphy ypclk 4[%apb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy  refpclkz 4< %apb[okayTmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy  refpclk{ 4< %apb[ disabled\usb2phy@fe8a0000,rockchip,rk3568-usb2phy phyclkclk_usbphy0_480m  ?0okayhost-port 4 disabledotg-port 4okayusb2phy@fe8b0000,rockchip,rk3568-usb2phy phyclkclk_usbphy1_480m  ?0okayhost-port 4okayotg-port 4 disabledpinctrl,rockchip,rk3568-pinctrla gpio@fdd60000,rockchip,gpio-bank  !.  O _  k!gpio@fe740000,rockchip,gpio-bank t "cd O _  kgpio@fe750000,rockchip,gpio-bank u #ef O _@  kggpio@fe760000,rockchip,gpio-bank v $gh O _`  kgpio@fe770000,rockchip,gpio-bank w %ij O _  kYpcfg-pull-up wpcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1 w pcfg-pull-up-drv-level-2 w pcfg-pull-none-smt  pcfg-output-low acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 cpuebcedpdpemmcemmc-rstnout qemmc-bus8   memmc-clk nemmc-cmd oemmc-datastrobe peth0eth1flashfspifspi-pins` lgmac0gmac1gpuhdmitxhdmitxm0-cec ]i2c0i2c0-xfer   i2c1i2c1-xfer  i2c2i2c2m1-xfer   i2c3i2c3m0-xfer i2c4i2c4m0-xfer   i2c5i2c5m1-xfer i2s1i2s1m0-lrcktx ti2s1m0-mclk "i2s1m0-sclktx si2s1m0-sdi0  ui2s1m0-sdo0 vi2s2i2s2m0-lrcktx xi2s2m0-sclktx wi2s2m0-sdi yi2s2m0-sdo zi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk {pdmm0-clk1 |pdmm0-sdi0  }pdmm0-sdi1  ~pdmm0-sdi2  pdmm0-sdi3 pmicpmic-int-l #pmupwm0pwm0m1-pins )pwm1pwm1m0-pins *pwm2pwm2m0-pins +pwm3pwm3-pins ,pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ csdmmc0-clk dsdmmc0-cmd esdmmc0-det fsdmmc1sdmmc1-bus4@ hsdmmc1-clk jsdmmc1-cmd isdmmc1-det  ksdmmc2sdmmc2m0-bus4@ Isdmmc2m0-clk Ksdmmc2m0-cmd Jspdifspdifm0-tx spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer (uart1uart1m1-xfer uart1m1-ctsn uart1m1-rtsn uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2gpio-btnsbtn-pins-ctrl      btn-pins-vol joy-muxjoy-mux-en sdio-pwrseqwifi-enable-h vcc3v3-lcdvcc-lcd-h vcc-wifivcc-wifi-h gpio-lcdlcd-rst Xtouchtouch-rst chosen serial2:1500000n8adc-keys ,adc-keys  buttons w@ <button-mode MODE %< 0gpio-keys-control ,gpio-keysdefaultbutton-b  SOUTH %0button-down  DPAD-DOWN %!button-l1   TL %6button-l2   TL2 %8button-select  SELECT %:button-start   START %;button-up  DPAD-UP % button-x  NORTH %3button-a  EAST %1button-left  DPAD-LEFT %"button-right  DPAD-RIGHT %#button-thumbl  THUMBL %=button-thumbr  THUMBR %>button-y  WEST %4button-r1   TR %7button-r2   TR2 %9gpio-keys-vol ,gpio-keys Jdefaultbutton-vol-down  VOLUMEDOWN %rbutton-vol-up  VOLUMEUP %shdmi-con,hdmi-connector^?cportendpoint`pwm-leds ,pwm-ledsled-0 U [on ipower r aled-1 U icharging r aled-2 U [off istatus r asdio-pwrseq,mmc-pwrseq-simple ext_clockdefault  YHregulator-vcc3v3-lcd0,regulator-fixed ! default?Q2Zi2Zvcc3v3_lcd0_nZregulator-state-memregulator-vcc-sys,regulator-fixed+?Q9i9vcc_sys$regulator-vcc-wifi,regulator-fixed  !default+?Q2Zi2Z vcc_wifiLpwm-vibrator ,pwm-vibrator enable ;adc-joystick ,adc-joystick default < axis@0     %axis@1     %axis@2     %axis@3     %adc-mux,io-channel-mux left_xright_xleft_yright_y   parent  dbacklight,pwm-backlight $ aWmux-controller ,gpio-mux !! battery,simple-battery !0 C ` @@  ? 3@ !?d=_<ʀZ;U;P:aPK9XF9(A8<827727[-7`(6#66}8635Ɉ5H 43@&sound,simple-audio-card =rk817_intTi2s 6YmCTMicrophoneMic JackHeadphoneHeadphonesSpeakerInternal SpeakersEnMICLMic JackHeadphonesHPOLHeadphonesHPORInternal SpeakersSPKOsimple-audio-card,codecsimple-audio-card,cpu interrupt-parent#address-cells#size-cellscompatiblechassis-typemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2mmc3device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grf#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-initial-moderegulator-nameregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendmonitored-batteryrockchip,resistor-sense-micro-ohmsrockchip,sleep-enter-current-microamprockchip,sleep-filter-current-microampfcs,suspend-voltage-selectorvin-supplydmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencybus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-mmcno-sdnon-removablesd-uhs-sdr50vmmc-supplyvqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointbacklightreset-gpiosvdd-supplyddc-i2c-busrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanescd-gpiosdisable-wpsd-uhs-sdr104mmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellstouchscreen-size-xtouchscreen-size-yuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enableoutput-lowrockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltautorepeatcolordefault-statefunctionmax-brightnesspwmspost-power-on-delay-msgpioenable-active-highpwm-namesabs-flatabs-fuzzabs-rangemux-controlssettle-time-uspower-supplymux-gpios#mux-control-cellscharge-full-design-microamp-hourscharge-term-current-microampconstant-charge-current-max-microampconstant-charge-voltage-max-microvoltfactory-internal-resistance-micro-ohmsvoltage-max-design-microvoltvoltage-min-design-microvoltocv-capacity-celsiusocv-capacity-table-0simple-audio-card,hp-det-gpiosimple-audio-card,widgetssimple-audio-card,routing